i.MX6 PCIe memory map issue

mithunk — Fri, 24 Jun 2016 13:57:06 GMT

Hi,

We have a custom board with i.Mx6q processor where PCIe Switch (89HPES4T4G2ZCALGI) is connected to the PCIe lines of the processor and the ethernet controller (i210) is connected to the downstream port of the PCIe switch.

We are able to detect the switch and connected device (lspci) but unable to map the memory for the device.
Attached log for the reference.

We are using Yocto linux 3.10.17 linux kernel for our testing.

Whether anyone tested PCIe switch with linux 3.10.17 ?

Regards,
Mithun

Original Attachment has been moved to: bootlog.txt.zip

Re: i.MX6 PCIe memory map issue

Yuri — Tue, 28 Jun 2016 04:12:35 GMT

Hello,

Weidong wrote in imx6q support switch PCIe????

... haredware and BSP both support PCIe switch, we have tested PCIe switch in imx_3.10.17,

please refer to this link:

https://community.freescale.com/thread/324940

Have a great day,
Yuri

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Re: i.MX6 PCIe memory map issue

浩卢 — Fri, 11 Nov 2016 14:38:46 GMT

I am having problems getting up and running with an embedded i210 (flash-less) based design on an ARM platform under Linux.

The main problem is that there is not enough information in the i210 datash=
eet to indicate exactly what minimum amount of iNVM data needs to be progra=
mmed to get the device to work with the igb driver. I've summarised the cur=
rent status below ...

I have previously successfully used the 82574 on an embedded Core i7/Window=
s design. That was simple to program and get working using EEUPDATE. I was =
planning to use the 82574 again on this ARM-based project. However, our dis=
tributor (Arrow Electronics) recommended that I instead use the newer i210,=
especially because it supports "flash-less" operation - and Linux driver s=
upport is available. (Also I need industrial temperature operation.)

I have connected the i210 to the PCI Express interface on my i.MX6 processo=
r. NVM, NC_SI and SMB pins are all unused (and have appropriate pullup/pull=
down resistors). The "SECURITY ENABLE" strapping option is set to enabled. =
The i210 is correctly being detected on the PCI Express interface, and is r=
eporting its expected "blank" Device ID of 0x1531.

The Linux driver (igb-5.0.5) does not recognise the device (because 0x1531 =
does not appear in the Device IDs listed in e1000_hw.h).

It appears that the driver was recently updated to support "flashless" i210=
operation, and a device ID was added for this:

#define E1000_DEV_ID_I210_COPPER_FLASHLESS 0x157B

So it appears that the iNVM must be programmed to contain at least this Dev=
ice ID.

I also have the programming tool "eepromARMtool0.6.5". The release notes fo=
r this state that it only supports programming an i210 WITH Flash memory co=
nnected, or an i211 iNVM. However the source code suggests that actually it=
does check for iNVM presence in the i210 and should work with that configu=
ration.

At the moment, eepromARM tool just crashes with a "bus error". I need to in=
vestigate this more and get it working.

When I do get the tool working so that I can program the i210's iNVM, do yo=
u please have information on the minimum data I need to program to get the =
device to work with the igb-5.0.5 driver. Is just the Device ID 0x157B suff=
icient? As the iNVM is a "one time only" device, I don't want to have to tr=
y out too many different settings as these will quickly use up all availabl=
e addresses and I'll have to solder on a new i210! Also if possible, our so=
ftware team would prefer the MAC address to be set by software, and therefo=
re preferably NOT included in the iNVM data.

Thanks in anticipation.
Best regards,

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i.MX6 PCIe memory map issue

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Re: i.MX6 PCIe memory map issue