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    <title>topic When u-boot jump to serial downloader mode in u-boot? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/When-u-boot-jump-to-serial-downloader-mode-in-u-boot/m-p/563772#M87134</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Hello commuity,&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;I have one question concern with low level boot sequence.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Environment :&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;&amp;nbsp;- i.MX6DL @800MHz&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;&amp;nbsp;- DDR3 x 4pcs. (64bit bus)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;&amp;nbsp;- SPI-NOR (u-boot and kernel)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;&amp;nbsp;- eMMC (RootFS)&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;When SPI-NOR boot is selected:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;&amp;nbsp; i.e. BOOT_MODE[1:0]=Internal Boot, BOOT_CFG1[7:4]=Serial ROM(SPI)&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;In this case, the system boot up sequence is as following :&lt;/SPAN&gt;&lt;/P&gt;&lt;OL style="list-style-type: decimal;"&gt;&lt;LI&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;ROM code copy 4K byte data (include IVT and DCD table) from &lt;BR /&gt;&amp;nbsp; SPI-NOR to OCRAM.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Init the DDR base on the DCD table settings.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Copy and Load the u-boot form SPI-NOR to DDR.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Jump to DDR to executes the u-boot.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;A piece of DDR&amp;nbsp; was broken after ESD test, so DDR stress test became fail.&lt;/P&gt;&lt;P&gt;In other word, maybe above process 3, 4 (i.e.&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Copy and Load the u-boot / jump to DDR address) is not executed.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV dir="ltr" style="zoom: 1;"&gt;&lt;SPAN class="" lang="en"&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV dir="ltr" style="zoom: 1;"&gt;&lt;SPAN class="" lang="en"&gt;&lt;SPAN&gt;[Question]&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV dir="ltr" style="zoom: 1;"&gt;&lt;SPAN class="" lang="en"&gt;&lt;SPAN&gt;In &lt;/SPAN&gt;&lt;SPAN&gt;this case&lt;/SPAN&gt;&lt;SPAN&gt;,&lt;/SPAN&gt; &lt;SPAN&gt;the i.MX6 ROM BIOS&lt;/SPAN&gt; &lt;SPAN&gt;will&lt;/SPAN&gt; &lt;SPAN&gt;transition&lt;/SPAN&gt; &lt;SPAN&gt;to the serial&lt;/SPAN&gt; &lt;SPAN&gt;download mode&lt;/SPAN&gt;&lt;SPAN&gt;?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Kanou&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sun, 28 Aug 2016 09:19:41 GMT</pubDate>
    <dc:creator>kanoumamoru</dc:creator>
    <dc:date>2016-08-28T09:19:41Z</dc:date>
    <item>
      <title>When u-boot jump to serial downloader mode in u-boot?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/When-u-boot-jump-to-serial-downloader-mode-in-u-boot/m-p/563772#M87134</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Hello commuity,&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;I have one question concern with low level boot sequence.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Environment :&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;&amp;nbsp;- i.MX6DL @800MHz&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;&amp;nbsp;- DDR3 x 4pcs. (64bit bus)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;&amp;nbsp;- SPI-NOR (u-boot and kernel)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;&amp;nbsp;- eMMC (RootFS)&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;When SPI-NOR boot is selected:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;&amp;nbsp; i.e. BOOT_MODE[1:0]=Internal Boot, BOOT_CFG1[7:4]=Serial ROM(SPI)&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;In this case, the system boot up sequence is as following :&lt;/SPAN&gt;&lt;/P&gt;&lt;OL style="list-style-type: decimal;"&gt;&lt;LI&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;ROM code copy 4K byte data (include IVT and DCD table) from &lt;BR /&gt;&amp;nbsp; SPI-NOR to OCRAM.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Init the DDR base on the DCD table settings.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Copy and Load the u-boot form SPI-NOR to DDR.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Jump to DDR to executes the u-boot.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;A piece of DDR&amp;nbsp; was broken after ESD test, so DDR stress test became fail.&lt;/P&gt;&lt;P&gt;In other word, maybe above process 3, 4 (i.e.&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Copy and Load the u-boot / jump to DDR address) is not executed.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV dir="ltr" style="zoom: 1;"&gt;&lt;SPAN class="" lang="en"&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV dir="ltr" style="zoom: 1;"&gt;&lt;SPAN class="" lang="en"&gt;&lt;SPAN&gt;[Question]&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV dir="ltr" style="zoom: 1;"&gt;&lt;SPAN class="" lang="en"&gt;&lt;SPAN&gt;In &lt;/SPAN&gt;&lt;SPAN&gt;this case&lt;/SPAN&gt;&lt;SPAN&gt;,&lt;/SPAN&gt; &lt;SPAN&gt;the i.MX6 ROM BIOS&lt;/SPAN&gt; &lt;SPAN&gt;will&lt;/SPAN&gt; &lt;SPAN&gt;transition&lt;/SPAN&gt; &lt;SPAN&gt;to the serial&lt;/SPAN&gt; &lt;SPAN&gt;download mode&lt;/SPAN&gt;&lt;SPAN&gt;?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif'; color: windowtext;"&gt;Kanou&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 28 Aug 2016 09:19:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/When-u-boot-jump-to-serial-downloader-mode-in-u-boot/m-p/563772#M87134</guid>
      <dc:creator>kanoumamoru</dc:creator>
      <dc:date>2016-08-28T09:19:41Z</dc:date>
    </item>
    <item>
      <title>Re: When u-boot jump to serial downloader mode in u-boot?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/When-u-boot-jump-to-serial-downloader-mode-in-u-boot/m-p/563773#M87135</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kanou&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you are right: in this case i.MX6 ROM BIOS will transition to the serial download mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 28 Aug 2016 23:23:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/When-u-boot-jump-to-serial-downloader-mode-in-u-boot/m-p/563773#M87135</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-08-28T23:23:30Z</dc:date>
    </item>
    <item>
      <title>Re: When u-boot jump to serial downloader mode in u-boot?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/When-u-boot-jump-to-serial-downloader-mode-in-u-boot/m-p/563774#M87136</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for replying.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My customer say:&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;If possible, Would you&lt;/SPAN&gt; &lt;SPAN class=""&gt;tell&lt;/SPAN&gt; &lt;SPAN class=""&gt;me&lt;/SPAN&gt; &lt;SPAN class=""&gt;how&lt;/SPAN&gt; &lt;SPAN class=""&gt;serial download mode&lt;/SPAN&gt; &lt;SPAN class=""&gt;is&lt;/SPAN&gt; &lt;SPAN class=""&gt;determined&lt;/SPAN&gt; &lt;SPAN class=""&gt;by&lt;/SPAN&gt; &lt;SPAN class=""&gt;the&lt;/SPAN&gt; &lt;SPAN class=""&gt;BIOS&lt;/SPAN&gt;.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;What kind of logic does it change in a serial downloading mode in?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;For example, jump to exception interrupt handler, DDR CRC check error, ....&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;kanou&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Aug 2016 04:32:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/When-u-boot-jump-to-serial-downloader-mode-in-u-boot/m-p/563774#M87136</guid>
      <dc:creator>kanoumamoru</dc:creator>
      <dc:date>2016-08-29T04:32:40Z</dc:date>
    </item>
    <item>
      <title>Re: When u-boot jump to serial downloader mode in u-boot?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/When-u-boot-jump-to-serial-downloader-mode-in-u-boot/m-p/563775#M87137</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kanou&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;yes ROM executes jump to exception interrupt handler.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards&lt;BR /&gt;igor&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Aug 2016 05:32:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/When-u-boot-jump-to-serial-downloader-mode-in-u-boot/m-p/563775#M87137</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-08-29T05:32:33Z</dc:date>
    </item>
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