i.MX ProcessorsのトピックRe: i.MX7 LPDDR2 byte and bit swapping.

i.MX7 LPDDR2 byte and bit swapping.

satoshishimoda — Wed, 27 Jul 2016 02:00:18 GMT

Hi community,

Our customer have a question about i.MX7 LPDDR2 layout.

They want to use byte swapping and bit swapping with LPDDR2, but there is no hardware design guide for i.MX7 to judge whether it is ok or not.

So would you give us advise whether they can use byte swapping and bit swapping or not for LPDDR2 with i.MX7?

Best Regards,

Satoshi Shimoda

Re: i.MX7 LPDDR2 byte and bit swapping.

Yuri — Wed, 27 Jul 2016 04:37:19 GMT

Hello,

Strictly speaking, JEDEC provides pad sequence standardization for LPDDR2 :

"Ordering of DQ bits shall be maintained in the system, including within the

package and on the PCB. DQ byte swapping and DQ bit Swapping are not allowed in

the system."

Have a great day,
Yuri

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Re: i.MX7 LPDDR2 byte and bit swapping.

satoshishimoda — Wed, 27 Jul 2016 04:41:32 GMT

Hello Yuri,

Thank you for your quick response.

OK, I understood that byte and bit swapping are prohibited for LPDDR2.

Best Regards,

Satoshi Shimoda