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    <title>topic MIPI CSI-2 skip first data lane in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI-2-skip-first-data-lane/m-p/537070#M85089</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;BR /&gt;I'm trying to use a ov5640 camera configuring just a single lane data, in particular I'm trying to use just the second one. Is it possible? Can I exclude first lane?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Referring to this post &lt;A href="https://community.nxp.com/thread/429436"&gt;Single Lane Mipi interface to i.mx6&lt;/A&gt; , I'm using "One lane mode" and setup register 0x4800 MIPI CTRL 00&amp;nbsp; Bit[3] to 1 (0 Use lane1 as default data lane, 1 Use lane2 as default data lane).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Using a ov13850, I have also tried to use only two-lanes but data is correctly transferred only if I use first two ones, if I enable lanes 3 and 4 I obtain a MIPI data transfer error. So, is it possible to exclude first lanes?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;thank you, regards&lt;BR /&gt;Andrea&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 25 Jul 2016 07:43:04 GMT</pubDate>
    <dc:creator>adc1</dc:creator>
    <dc:date>2016-07-25T07:43:04Z</dc:date>
    <item>
      <title>MIPI CSI-2 skip first data lane</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI-2-skip-first-data-lane/m-p/537070#M85089</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;BR /&gt;I'm trying to use a ov5640 camera configuring just a single lane data, in particular I'm trying to use just the second one. Is it possible? Can I exclude first lane?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Referring to this post &lt;A href="https://community.nxp.com/thread/429436"&gt;Single Lane Mipi interface to i.mx6&lt;/A&gt; , I'm using "One lane mode" and setup register 0x4800 MIPI CTRL 00&amp;nbsp; Bit[3] to 1 (0 Use lane1 as default data lane, 1 Use lane2 as default data lane).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Using a ov13850, I have also tried to use only two-lanes but data is correctly transferred only if I use first two ones, if I enable lanes 3 and 4 I obtain a MIPI data transfer error. So, is it possible to exclude first lanes?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;thank you, regards&lt;BR /&gt;Andrea&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Jul 2016 07:43:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI-2-skip-first-data-lane/m-p/537070#M85089</guid>
      <dc:creator>adc1</dc:creator>
      <dc:date>2016-07-25T07:43:04Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI CSI-2 skip first data lane</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI-2-skip-first-data-lane/m-p/537071#M85090</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; I am afraid this is impossible to use only lanes 2 and 3 of i.MX6 MIPI CSI.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Jul 2016 09:04:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI-2-skip-first-data-lane/m-p/537071#M85090</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-07-25T09:04:44Z</dc:date>
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