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    <title>topic Re: Question, i.MX6SL boot setting in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535577#M84994</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Miyamoto&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Should user set BOOT_CFG1[4] into ON(1) not only for SD fast boot but also for eMMC fast boot?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes, also for eMMC fast boot&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;We believe that BOOT_CFG2[1] written in Table8-13 is typo and the correct is BOOT_CFG1[2].&lt;/P&gt;&lt;P&gt;&amp;gt;Correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Could you show me the exact setting for the following condition?&lt;/P&gt;&lt;P&gt;======== the settings ========&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BOOT_CFG1[7:0] = 011? ??00&amp;nbsp;&amp;nbsp; &amp;lt;---&amp;nbsp; 0111 0000&lt;/P&gt;&lt;P&gt;BOOT_CFG2[7:0] = 1100 10?0&amp;nbsp;&amp;nbsp; &amp;lt;--- bit setting depends on used volage&lt;/P&gt;&lt;P&gt;BOOT_CFG3[7:0] = 0000 0000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 08 Jul 2016 04:32:31 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2016-07-08T04:32:31Z</dc:date>
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      <title>Question, i.MX6SL boot setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535574#M84991</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear NXP team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about the boot setting for i.MX6SL eMMC boot.&lt;/P&gt;&lt;P&gt;My customer wants to realize the fast boot on i.MX6SL system.&lt;/P&gt;&lt;P&gt;The customer thought that it is possible to realize fast boot from eMMC by configure DIPSW 1-4 on i.MX6SL-EVK board.&lt;/P&gt;&lt;P&gt;But after setting the DIPSW1-4, the boot from eMMC hanged.&lt;/P&gt;&lt;P&gt;And they found the following discussion in i.MX community.&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-thread-small" data-containerid="2004" data-containertype="14" data-objectid="354655" data-objecttype="1" href="https://community.nxp.com/thread/354655"&gt;https://community.nxp.com/thread/354655&lt;/A&gt;&lt;/P&gt;&lt;P&gt;After reading the community thread, they think that ‘fast boot’ from eMMC can not be realized even when they configure&lt;/P&gt;&lt;P&gt;They think the fast boot is available only when SD boot.&lt;/P&gt;&lt;P&gt;DIPSW1-4. And configuring EXT_CSD[179] seems to be needed for eMMC fast boot.&lt;/P&gt;&lt;P&gt;Is the above understanding correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Jul 2016 00:33:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535574#M84991</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2016-07-06T00:33:57Z</dc:date>
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      <title>Re: Question, i.MX6SL boot setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535575#M84992</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Miyamoto&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;They think the fast boot is available only when SD boot.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;right, as described in RM:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="1.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/35855iA99B84DA82390A4F/image-size/large?v=v2&amp;amp;px=999" role="button" title="1.jpg" alt="1.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;DIPSW1-4. And configuring EXT_CSD[179] seems to be needed for eMMC fast boot.&lt;/P&gt;&lt;P&gt;&amp;gt;Is the above understanding correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes this is correct understanding, links below may be useful&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/351590"&gt;imx6q, eMMC fast boot&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/354655"&gt;imx6q eMMC Fast Boot, someone using it can help ?&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Jul 2016 02:07:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535575#M84992</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-07-06T02:07:03Z</dc:date>
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      <title>Re: Question, i.MX6SL boot setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535576#M84993</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your reply.&lt;/P&gt;&lt;P&gt;We found the following written in RM at ‘Table 8-13. MMC and eMMC Boot Details’.&lt;/P&gt;&lt;P&gt;“This mode can be selected by BOOT_CFG1[4](Fast Boot) fuse.”&lt;/P&gt;&lt;P&gt; &lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_0.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/36496iB49B088863700F9B/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_0.png" alt="pastedImage_0.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Should user set BOOT_CFG1[4] into ON(1) not only for SD fast boot but also for eMMC fast boot?&lt;/P&gt;&lt;P&gt;And in the Table8-13, the following written is seen. (Under the blue line.)&lt;/P&gt;&lt;P&gt;“BOOT ACK is selected by BOOT_CFG2[1].”&lt;/P&gt;&lt;P&gt;The BOOT_CFG2[1] is described in Table5-5 as ‘Fast boot Acknowledge disable’.&lt;/P&gt;&lt;P&gt;We believe that BOOT_CFG2[1] written in Table8-13 is typo and the correct is BOOT_CFG1[2].&lt;/P&gt;&lt;P&gt;Correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you show me the exact setting for the following condition?&lt;/P&gt;&lt;P&gt;======= the condition ========&lt;/P&gt;&lt;P&gt;　[User Partition] enabled for boot.&lt;/P&gt;&lt;P&gt;　 Fast boot acknowledgement: [Enabled]&lt;/P&gt;&lt;P&gt;　 Fast boot bus width: [8 bit]&lt;/P&gt;&lt;P&gt;　 DDR boot mode: [Enabled]&lt;/P&gt;&lt;P&gt;　 [Retain] boot bus width settings.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;　EXT_CSD[179] = 0x78&lt;/P&gt;&lt;P&gt;　EXT_CSD[177] = 0x16&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;======== end of the condition ========&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;======== the settings ========&lt;/P&gt;&lt;P&gt;　　　BOOT_CFG1[7:0] = 011&lt;SPAN style="color: red;"&gt;? ??&lt;/SPAN&gt;00&lt;/P&gt;&lt;P&gt;　　　BOOT_CFG2[7:0] = 1100 10&lt;SPAN style="color: red;"&gt;?&lt;/SPAN&gt;0&lt;/P&gt;&lt;P&gt;　　　BOOT_CFG3[7:0] = 0000 0000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; EXT_CSD[179] = 0x&lt;SPAN style="color: red;"&gt;??&lt;/SPAN&gt;&amp;nbsp; (if change from 0x78 is needed)&lt;/P&gt;&lt;P&gt; EXT_CSD[177] = 0x&lt;SPAN style="color: red;"&gt;??&lt;/SPAN&gt;&amp;nbsp; (if change from 0x16 is needed)&lt;/P&gt;&lt;P&gt;===========================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class="MsoNormal"&gt;&lt;SPAN lang="EN-US"&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="MsoNormal"&gt;&lt;SPAN lang="EN-US"&gt;Miyamoto&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Jul 2016 02:19:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535576#M84993</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2016-07-08T02:19:53Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX6SL boot setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535577#M84994</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Miyamoto&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Should user set BOOT_CFG1[4] into ON(1) not only for SD fast boot but also for eMMC fast boot?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes, also for eMMC fast boot&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;We believe that BOOT_CFG2[1] written in Table8-13 is typo and the correct is BOOT_CFG1[2].&lt;/P&gt;&lt;P&gt;&amp;gt;Correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Could you show me the exact setting for the following condition?&lt;/P&gt;&lt;P&gt;======== the settings ========&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BOOT_CFG1[7:0] = 011? ??00&amp;nbsp;&amp;nbsp; &amp;lt;---&amp;nbsp; 0111 0000&lt;/P&gt;&lt;P&gt;BOOT_CFG2[7:0] = 1100 10?0&amp;nbsp;&amp;nbsp; &amp;lt;--- bit setting depends on used volage&lt;/P&gt;&lt;P&gt;BOOT_CFG3[7:0] = 0000 0000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Jul 2016 04:32:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535577#M84994</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-07-08T04:32:31Z</dc:date>
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      <title>Re: Question, i.MX6SL boot setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535578#M84995</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks so much for your answer.&lt;/P&gt;&lt;P&gt;We found the following threads on i.MX community.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;A _jive_internal="true" href="https://community.nxp.com/message/808909"&gt;https://community.nxp.com/message/808909&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;A _jive_internal="true" href="https://community.nxp.com/thread/351590"&gt;https://community.nxp.com/thread/351590&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;A _jive_internal="true" href="https://community.nxp.com/thread/354655"&gt;https://community.nxp.com/thread/354655&lt;/A&gt;&lt;/P&gt;&lt;P&gt;And in all the above threads, they said that i.MX6SX cannot boot-up from eMMC when BOOT_CFG1[4] = ON in their experience.&lt;/P&gt;&lt;P&gt;And in conclusion, all of the threads are concluded with “BOOT_CFG1[4] should be OFF for boot-up from eMMC”.&lt;/P&gt;&lt;P&gt;Then, it seems that your comment, BOOT_CFG1[7:0] &amp;lt;= 0111 0000, and the threads do not match.&lt;/P&gt;&lt;P&gt;Could you give your comment on that?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 Jul 2016 01:16:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535578#M84995</guid>
      <dc:creator>SLICE</dc:creator>
      <dc:date>2016-07-13T01:16:07Z</dc:date>
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      <title>Re: Question, i.MX6SL boot setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535579#M84996</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Miyamoto&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;sorry, I can not comment on other therads.&lt;/P&gt;&lt;P&gt;Regarding “BOOT_CFG1[4] description RM is correct, also I checked&lt;/P&gt;&lt;P&gt;i.MX6SL ROM sources, it uses BOOT_CFG1[4] during eMMC fast boot.&lt;/P&gt;&lt;P&gt;Please create new thread with detailed problem description,&lt;/P&gt;&lt;P&gt;if you have issues with eMMC boot.&lt;/P&gt;&lt;P&gt;In particular what processor you are speaking: SL or SX,&lt;/P&gt;&lt;P&gt;first question was about SL, last update for SX.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 Jul 2016 01:37:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535579#M84996</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-07-13T01:37:00Z</dc:date>
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      <title>Re: Question, i.MX6SL boot setting</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535580#M84997</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;Hi Igor,&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;gt; Please create new thread with detailed problem description,&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;OK, I will create.&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;gt; In particular what processor you are speaking: SL or SX,&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;gt; first question was about SL, last update for SX.&lt;/P&gt;&lt;P&gt;Sorry, I missed. It's SL.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 Jul 2016 11:01:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-boot-setting/m-p/535580#M84997</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2016-07-15T11:01:26Z</dc:date>
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