<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic IMX6UL in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX6UL/m-p/515219#M83857</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Using I.MX6UL, is it possible to use 128MB parallel NOR flash with 2 ENET? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Some of the ENET control pins such RX_ER &amp;amp; RX_EN conflicts with the EXTI pins, does the ENET requires all the pins to be connected accordingly? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What is the minimal required pins that the ENET needs to be connected to function properly? &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 06 Jun 2016 10:18:05 GMT</pubDate>
    <dc:creator>kerkchoonhuei</dc:creator>
    <dc:date>2016-06-06T10:18:05Z</dc:date>
    <item>
      <title>IMX6UL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6UL/m-p/515219#M83857</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Using I.MX6UL, is it possible to use 128MB parallel NOR flash with 2 ENET? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Some of the ENET control pins such RX_ER &amp;amp; RX_EN conflicts with the EXTI pins, does the ENET requires all the pins to be connected accordingly? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What is the minimal required pins that the ENET needs to be connected to function properly? &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 06 Jun 2016 10:18:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6UL/m-p/515219#M83857</guid>
      <dc:creator>kerkchoonhuei</dc:creator>
      <dc:date>2016-06-06T10:18:05Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6UL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6UL/m-p/515220#M83858</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; You are right, the ENET control pins RX_ER &amp;amp; RX_EN conflict with high EIM address lines.&lt;/P&gt;&lt;P&gt;This does not allow to use both ENET and EIM NOR (128 M). There are no options on i.MX6UL&lt;/P&gt;&lt;P&gt;to resolve such conflict.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="tm7"&gt; Generally, when configuring GPIO, the Processor Expert for i.MX may be useful.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm6 a______"&gt;&lt;/P&gt;&lt;P class="tm6 a______"&gt;&lt;SPAN class="tm7"&gt;&lt;/SPAN&gt;&lt;SPAN style="text-decoration: underline;"&gt;&lt;A href="http://www.nxp.com/products/software-and-tools/software-development-tools/processor-expert-and-embedded-components/software-suites/processor-expert-for-i.mx:PROCESSOR-EXPERT-IMX?code=PROCESSOR-EXPERT-IMX&amp;amp;nodeId=015210BAF73F6BEC92&amp;amp;fpsp=1&amp;amp;tab=Design_Tools_"&gt;&lt;SPAN class="tm8"&gt;&lt;/SPAN&gt;&lt;/A&gt;&lt;A href="http://www.nxp.com/products/software-and-tools/software-development-tools/processor-expert-and-embedded-components/software-suites/processor-expert-for-i.mx:PROCESSOR-EXPERT-IMX?code=PROCESSOR-EXPERT-IMX&amp;amp;nodeId=015210BAF73F6BEC92&amp;amp;fpsp=1&amp;amp;tab=Design_Tools_Tab" target="test_blank"&gt;http://www.nxp.com/products/software-and-tools/software-development-tools/processor-expert-and-embedded-components/software-suites/processor-expert-for-i.mx:PROCESSOR-EXPERT-IMX?code=PROCESSOR-EXPERT-IMX&amp;amp;nodeId=015210BAF73F6BEC92&amp;amp;fpsp=1&amp;amp;tab=Design_Tools_Tab&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jun 2016 07:13:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6UL/m-p/515220#M83858</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-06-08T07:13:12Z</dc:date>
    </item>
  </channel>
</rss>

