https://community.nxp.com/t5/i-MX-Processors/iMX6Q-How-to-work-a-software-reset-set-SRC-SCR-register/m-p/513931#M83766 <HTML><HEAD></HEAD><BODY><P>Hello, </P><P></P><P>&nbsp; timings for the secondary CPU reset are not specified, since this</P><P>is mainly software, not hardware, process.</P><P>"Once the bits are set, the corresponding core is released from its reset state,</P><P>and it executes the boot ROM (at 0000 0000h). The boot ROM determines if it <BR />is a secondary core and uses the persistent bit registers to determine what to <BR />execute next."</P><P></P><P>Have a great day,<BR />Yuri</P><P></P><P>-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Mon, 06 Jun 2016 05:44:31 GMT Yuri 2016-06-06T05:44:31Z https://community.nxp.com/t5/i-MX-Processors/iMX6Q-How-to-work-a-software-reset-set-SRC-SCR-register/m-p/513930#M83765 <HTML><HEAD></HEAD><BODY><P>Dear community,<BR />I am checking a SRC_SCR register coreX_rst field. (X is 0,1,2,3)</P><P></P><P></P><P>In the case of setting a coreX_rst field , does the reset process begin immediately ?</P><P>Or , after performing any process , does the reset process subsequently begin ?</P><P></P><P>Best Regards,<BR />Koichi Sakagami </P></BODY></HTML> Fri, 03 Jun 2016 09:46:40 GMT https://community.nxp.com/t5/i-MX-Processors/iMX6Q-How-to-work-a-software-reset-set-SRC-SCR-register/m-p/513930#M83765 koichisakagami 2016-06-03T09:46:40Z https://community.nxp.com/t5/i-MX-Processors/iMX6Q-How-to-work-a-software-reset-set-SRC-SCR-register/m-p/513931#M83766 <HTML><HEAD></HEAD><BODY><P>Hello, </P><P></P><P>&nbsp; timings for the secondary CPU reset are not specified, since this</P><P>is mainly software, not hardware, process.</P><P>"Once the bits are set, the corresponding core is released from its reset state,</P><P>and it executes the boot ROM (at 0000 0000h). The boot ROM determines if it <BR />is a secondary core and uses the persistent bit registers to determine what to <BR />execute next."</P><P></P><P>Have a great day,<BR />Yuri</P><P></P><P>-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Mon, 06 Jun 2016 05:44:31 GMT https://community.nxp.com/t5/i-MX-Processors/iMX6Q-How-to-work-a-software-reset-set-SRC-SCR-register/m-p/513931#M83766 Yuri 2016-06-06T05:44:31Z