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    <title>i.MX Processors中的主题 Re: Problem with disabling the MPLL</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512241#M83545</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 16 Mar 2016 11:26:24 GMT</pubDate>
    <dc:creator>craighillis</dc:creator>
    <dc:date>2016-03-16T11:26:24Z</dc:date>
    <item>
      <title>Problem with disabling the MPLL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512235#M83539</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;When using a 26 MHz crystal, we can disable the MPLL to go to sleep mode. When the crystal is replaced with a 26 MHz oscillator, the MPLL is not reliably disabled.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The Reference manual states:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The conditions to be satisfied before the PLL Clock Controller actually turns off the MPLL are as&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;follows:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Clock Controller module has successfully mastered the system bus.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. The A9P_CLK_OFF signal from the ARM9 Platform is active.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3. SDRAM controller has successfully placed the external SDRAM into Self-Refresh mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;4. After the above conditions are satisfied, the countdown based on the value in the SD_CNT field&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;will be initiated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;5. SD_CNT countdown completes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What could prevent the Clock Controller module from successfully mastering the system bus?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 08 Mar 2016 17:20:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512235#M83539</guid>
      <dc:creator>craighillis</dc:creator>
      <dc:date>2016-03-08T17:20:43Z</dc:date>
    </item>
    <item>
      <title>Re: Problem with disabling the MPLL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512236#M83540</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Craig&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Clock Controller module may not successfully master the system bus&lt;/P&gt;&lt;P&gt;due to incorrect power-up sequence or external 26MHz clock noise /&lt;/P&gt;&lt;P&gt;noise on OSC26VDD, MPLLVDD power supplies. Note, external clock should&lt;/P&gt;&lt;P&gt;not be provided to unpowered processor, it should be applied along with&lt;/P&gt;&lt;P&gt;OSC26VDD power supply.&amp;nbsp; In general one can check low power mode sequence&lt;/P&gt;&lt;P&gt;by oscillosope outputting MPLL clock on CLKO pin with CCSR register or&lt;/P&gt;&lt;P&gt;check CKE signal with Figure 18-37. SDRAM/LPDDR Enter Self Refresh Mode&lt;/P&gt;&lt;P&gt;During System Sleep Mode i.MX27 RM.&lt;/P&gt;&lt;P&gt;Datasheet on p.28 recommends to disable oscillator circuit with CSCR (OSC26M_DIS)&lt;/P&gt;&lt;P&gt;and apply clock to EXTAL26M.&amp;nbsp; &lt;A href="http://cache.freescale.com/files/dsp/doc/data_sheet/MCIMX27EC.pdf" title="http://cache.freescale.com/files/dsp/doc/data_sheet/MCIMX27EC.pdf"&gt;http://cache.freescale.com/files/dsp/doc/data_sheet/MCIMX27EC.pdf&lt;/A&gt; &lt;/P&gt;&lt;P&gt;External clock may not have the desired spectral purity, only a crystal will provide the necessary signal quality.&lt;/P&gt;&lt;P&gt;Below oscillator specs&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="1.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/22716i2268A30965622A1B/image-size/large?v=v2&amp;amp;px=999" role="button" title="1.jpg" alt="1.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 11 Mar 2016 15:42:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512236#M83540</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-03-11T15:42:45Z</dc:date>
    </item>
    <item>
      <title>Re: Problem with disabling the MPLL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512237#M83541</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for the reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Where can I find a specification on spectral purity and noise for the 26MHz oscillator?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;According to the reference manual it can be a square wave.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When I first started looking at replacing the crystal with an oscillator I could not find any requirements for the i.MX27. A FAE at Avnet said to use the i.MX25 requirements.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, with regards to disabling the oscillator, we have tried that and the system does not run. In an earlier post you said:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hi Chris&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;this bit can disable internal schematic, related to input 26MHz clock.&lt;/P&gt;&lt;P&gt;OSC26M_DIS = 1 disable 26MHz clock at all. This may be needed, say,&lt;/P&gt;&lt;P&gt;to decrease consumption when 26MHz clock is not used.&lt;/P&gt;&lt;P&gt;So, for any 26MHz configuration (crystal or generator) OSC26M_DIS&lt;/P&gt;&lt;P&gt;should be cleared.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Craig&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Mar 2016 12:08:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512237#M83541</guid>
      <dc:creator>craighillis</dc:creator>
      <dc:date>2016-03-15T12:08:21Z</dc:date>
    </item>
    <item>
      <title>Re: Problem with disabling the MPLL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512238#M83542</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Craig&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;please create service request for providing&lt;/P&gt;&lt;P&gt;additional documents.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Mar 2016 12:17:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512238#M83542</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-03-15T12:17:48Z</dc:date>
    </item>
    <item>
      <title>Re: Problem with disabling the MPLL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512239#M83543</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;How and where do I create a service request?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Craig&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Mar 2016 14:04:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512239#M83543</guid>
      <dc:creator>craighillis</dc:creator>
      <dc:date>2016-03-15T14:04:46Z</dc:date>
    </item>
    <item>
      <title>Re: Problem with disabling the MPLL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512240#M83544</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;To submit case&amp;nbsp; please follow below steps: &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;1) Go to &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.freescale.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fsupport%2Fsales-and-support%3ASUPPORTHOME" rel="nofollow" target="_blank"&gt;http://www.nxp.com/support/sales-and-support:SUPPORTHOME&lt;/A&gt;&lt;SPAN&gt;. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;2) On the bottom of the page under Submit New Issues, click Hardware &amp;amp; Software. &lt;/P&gt;&lt;P&gt;3) Register with your business email to access NXP technical online support. &lt;/P&gt;&lt;P&gt;4) A verification email will be sent to your account. Click the link embedded in that email to verify your access. &lt;/P&gt;&lt;P&gt;5) On the NXP online support page, select Contact Support from the top menu &lt;/P&gt;&lt;P&gt;and click ôsubmit a new caseö to start the process&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Mar 2016 01:41:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512240#M83544</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-03-16T01:41:19Z</dc:date>
    </item>
    <item>
      <title>Re: Problem with disabling the MPLL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512241#M83545</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Mar 2016 11:26:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problem-with-disabling-the-MPLL/m-p/512241#M83545</guid>
      <dc:creator>craighillis</dc:creator>
      <dc:date>2016-03-16T11:26:24Z</dc:date>
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