topic Re: How to enable native and gpio cs on ecspi in i.MX Processors

How to enable native and gpio cs on ecspi

alimalik — Mon, 07 Mar 2016 10:36:57 GMT

I am having some issue getting the SPI to work on IMX6. The question I have is how do we enable multiple CS on SPI. This is what I currently have.

ecspi1 is using its 2 native chipselects and I also have a gpio CS.

This is what i did in my .dtsi file

ecspi1 {

pinctrl_ecspi1_cs_1: ecspi1_cs_grp-1 {

fsl,pins = <

MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x80000000 /* GPIO CS*/

MX6QDL_PAD_KEY_COL2__ECSPI1_SS1 0x80000000

MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0 0x80000000

};

&ecspi1 {

fsl,spi-num-chipselects = <3>;

cs-gpios = <&gpio4 11 0>, <&gpio4 10 0>, <&gpio4 9 0>;

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_ecspi1_2>, <&pinctrl_ecspi1_cs_1>;

status = "okay";

ads7846@0x00 {

reg = <0>; /* CS0 */

compatible = "ti,ads7846";

interrupt-parent = <&gpio1>;

interrupts = <4 1>;

spi-max-frequency = <1500000>;

pendown-gpio = <&gpio1 4 0>;

vcc-supply = <&reg_soc>;

ti,x-min = /bits/ 16 <4200>;

ti,x-max = /bits/ 16 <8080>;

ti,y-min = /bits/ 16 <4330>;

ti,y-max = /bits/ 16 <7980>;

ti,x-plate-ohms = /bits/ 16 <180>;

ti,pressure-max = /bits/ 16 <255>;

ti,debounce-max = /bits/ 16 <10>;

ti,debounce-tol = /bits/ 16 <3>;

ti,debounce-rep = /bits/ 16 <1>;

ti,settle-delay-usec = /bits/ 16 <150>;

ti,keep-vref-on;

ti,swap-xy;

linux,wakeup;

};

io_expander_1: spi_imx@0x00 {

compatible = "spi_imx";

spi-max-frequency = <20000000>;

reg = <1>;

};

io_expander_2: spi_imx@0x01 {

compatible = "spi_imx";

spi-max-frequency = <20000000>;

reg = <2>;

};

But I dont seem to get the io_expanders enables and noting appears in my /dev folder.

Any Ideas

Re: How to enable native and gpio cs on ecspi

alejandrolozan1 — Mon, 14 Mar 2016 20:41:09 GMT

Hi,

According to this: https://www.kernel.org/doc/Documentation/devicetree/bindings/spi/spi-bus.txt

you may try something like the next example in the cs-gpios property.

cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;

Then it should be configured so that num_chipselect = 4 with the

following mapping:

cs0 : &gpio1 0 0

cs1 : native

cs2 : &gpio1 1 0

cs3 : &gpio1 2 0

I hope that helps,

Alejandro

Re: How to enable native and gpio cs on ecspi

yann_cardaillac — Fri, 30 Aug 2019 15:06:29 GMT

Hi there,

Well sorry to dug this pretty old post, but here what one should have done to use several cs.