topic Re: VDD_SOC_IN in i.MX Processors

VDD_SOC_IN

bomsweigh — Fri, 22 Jan 2016 22:14:26 GMT

Hello,

We are developing an i.MX6 SOM that is designed to have common hardware for the SOLO, Dual, and Quad processors. We need to increase LDO_SOC to 1.225 to operate the VPU above 264MHz. Two questions have arisen,

1 - We noticed that there seems to be mention of reducing DDR jitter if LDO_SOC is 2.275V is this important?

2 - We were considering increasing the VDD_SOC_IN to 1.45V to margin the input above the drop in the internal LDO. Is this reasonable?

Thanks for your help,

Best Regards,

Re: VDD_SOC_IN

igorpadykov — Sun, 24 Jan 2016 10:28:56 GMT

Hi BOMS

1. in general the higher the voltage level on VDDSOC_CAP,

the less jitter. If there are jitter issues, an easy fix is to raise VDDSOC_CAP.

2. http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQCEC.pdf Table 6. Operating Ranges footnote 4:

VDD_ARM_IN and VDD_SOC_IN must be at least 125 mV higher than the LDO Output Set Point for correct voltage regulation.

Best regards

igor

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Re: VDD_SOC_IN

bomsweigh — Mon, 25 Jan 2016 13:29:30 GMT

Thank you for the quick reply.