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    <title>topic Please clarify i.MX6 UART Select Input Register dte-mode doesn't transmit chars on UART in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Please-clarify-i-MX6-UART-Select-Input-Register-dte-mode-doesn-t/m-p/507169#M82551</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please clarify i.MX6 UART Select Input.&lt;/P&gt;&lt;P&gt;Datasheet chapters:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;37.4.572&lt;/STRONG&gt; Select Input Register (IOMUXC_UART3_UART_RTS_B_SELECT_INPUT)&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;37.4.573&lt;/STRONG&gt; Select Input Register (IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Independently from the setting of fsl,dte-mode; in the DT, so I have not enabled it and I am working in DCE mode (iMX6 default), I see the behaviour below using Kernel linux-4.5.2.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Case #1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;-----------------------------------------------------------&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_CTS_B&amp;nbsp; 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_RTS_B&amp;nbsp; 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT4)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;root@wandboard-solo:~# ./memtool 20e0908 2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Reading 0x2 count starting at address 0x020E0908&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;0x020E0908:&amp;nbsp; 00000002 00000001&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Case #2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;-----------------------------------------------------------&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_RTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_CTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;root@wandboard-solo:~# ./memtool 20e0908 2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Reading 0x2 count starting at address 0x020E0908&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;0x020E0908:&amp;nbsp; 00000000 00000001&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Case #3&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;-----------------------------------------------------------&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_RTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_CTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;root@wandboard-solo:~# ./memtool 20e0908 2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Reading 0x2 count starting at address 0x020E0908&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;0x020E0908:&amp;nbsp; 00000000 00000000&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;If I change the IOMUXC_UART3_UART_RTS_B_SELECT_INPUT and/or IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT registers settings there is no changes in the UART behavoiur, so in DCE mode I always get TX data from MX6QDL_PAD_EIM_D24 where a change IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT shoud result in a different MX6QDL_PAD output for the TX (or RX) signal, but this is not true.&lt;/P&gt;&lt;P&gt;The conclusion seems that these registers setting are completely ignored by the CPU.&lt;/P&gt;&lt;P&gt;Could you please explain what is happening or what is wrong?&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;See also: &lt;A _jive_internal="true" href="https://community.nxp.com/message/642420"&gt;https://community.freescale.com/message/642420&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 06 May 2016 13:25:20 GMT</pubDate>
    <dc:creator>marcocavallini</dc:creator>
    <dc:date>2016-05-06T13:25:20Z</dc:date>
    <item>
      <title>Please clarify i.MX6 UART Select Input Register dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Please-clarify-i-MX6-UART-Select-Input-Register-dte-mode-doesn-t/m-p/507169#M82551</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please clarify i.MX6 UART Select Input.&lt;/P&gt;&lt;P&gt;Datasheet chapters:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;37.4.572&lt;/STRONG&gt; Select Input Register (IOMUXC_UART3_UART_RTS_B_SELECT_INPUT)&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;37.4.573&lt;/STRONG&gt; Select Input Register (IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Independently from the setting of fsl,dte-mode; in the DT, so I have not enabled it and I am working in DCE mode (iMX6 default), I see the behaviour below using Kernel linux-4.5.2.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Case #1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;-----------------------------------------------------------&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_CTS_B&amp;nbsp; 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_RTS_B&amp;nbsp; 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT4)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;root@wandboard-solo:~# ./memtool 20e0908 2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Reading 0x2 count starting at address 0x020E0908&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;0x020E0908:&amp;nbsp; 00000002 00000001&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Case #2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;-----------------------------------------------------------&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_RTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_CTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;root@wandboard-solo:~# ./memtool 20e0908 2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Reading 0x2 count starting at address 0x020E0908&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;0x020E0908:&amp;nbsp; 00000000 00000001&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Case #3&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;-----------------------------------------------------------&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_RTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_CTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;root@wandboard-solo:~# ./memtool 20e0908 2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Reading 0x2 count starting at address 0x020E0908&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;0x020E0908:&amp;nbsp; 00000000 00000000&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;If I change the IOMUXC_UART3_UART_RTS_B_SELECT_INPUT and/or IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT registers settings there is no changes in the UART behavoiur, so in DCE mode I always get TX data from MX6QDL_PAD_EIM_D24 where a change IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT shoud result in a different MX6QDL_PAD output for the TX (or RX) signal, but this is not true.&lt;/P&gt;&lt;P&gt;The conclusion seems that these registers setting are completely ignored by the CPU.&lt;/P&gt;&lt;P&gt;Could you please explain what is happening or what is wrong?&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;See also: &lt;A _jive_internal="true" href="https://community.nxp.com/message/642420"&gt;https://community.freescale.com/message/642420&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 06 May 2016 13:25:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Please-clarify-i-MX6-UART-Select-Input-Register-dte-mode-doesn-t/m-p/507169#M82551</guid>
      <dc:creator>marcocavallini</dc:creator>
      <dc:date>2016-05-06T13:25:20Z</dc:date>
    </item>
    <item>
      <title>Re: Please clarify i.MX6 UART Select Input Register dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Please-clarify-i-MX6-UART-Select-Input-Register-dte-mode-doesn-t/m-p/507170#M82552</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; The daisy chain feature is intended for multiplexing of input signals.&lt;/P&gt;&lt;P&gt;The following note is provided in IOMUXC_UART3_UART_RTS_B_SELECT_INPUT register description :&lt;/P&gt;&lt;P&gt;“Route RTS_B signal to pad when UART is in DCE mode. Route CTS_B signal to pad when UART is in&lt;/P&gt;&lt;P&gt;DTE mode.” This means, we should select the DAISY option only for input signal (it depends what mode &lt;/P&gt;&lt;P&gt;is used : DTE or DCE). Output signal is not involved in daisy chains.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 May 2016 07:34:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Please-clarify-i-MX6-UART-Select-Input-Register-dte-mode-doesn-t/m-p/507170#M82552</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-05-11T07:34:00Z</dc:date>
    </item>
    <item>
      <title>Re: Please clarify i.MX6 UART Select Input Register dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Please-clarify-i-MX6-UART-Select-Input-Register-dte-mode-doesn-t/m-p/507171#M82553</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;At last I understood the behaviour and solved the problem.&lt;/P&gt;&lt;P&gt;This post explains everything perfectly: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-97509"&gt;https://community.freescale.com/docs/DOC-97509&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Be careful: dte-mode swaps &lt;STRONG&gt;RTS/CTS&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="text-decoration: underline;"&gt;and TX/RX&lt;/STRONG&gt; pins&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 16 May 2016 14:00:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Please-clarify-i-MX6-UART-Select-Input-Register-dte-mode-doesn-t/m-p/507171#M82553</guid>
      <dc:creator>marcocavallini</dc:creator>
      <dc:date>2016-05-16T14:00:32Z</dc:date>
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