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    <title>i.MX Processors中的主题 GPIO Pulldown IMX6SL</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/GPIO-Pulldown-IMX6SL/m-p/504989#M81956</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;How can I set a GPIO pin to be a pulldown without using an external resistor? &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 26 May 2016 18:47:32 GMT</pubDate>
    <dc:creator>stephangm</dc:creator>
    <dc:date>2016-05-26T18:47:32Z</dc:date>
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      <title>GPIO Pulldown IMX6SL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/GPIO-Pulldown-IMX6SL/m-p/504989#M81956</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;How can I set a GPIO pin to be a pulldown without using an external resistor? &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 26 May 2016 18:47:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/GPIO-Pulldown-IMX6SL/m-p/504989#M81956</guid>
      <dc:creator>stephangm</dc:creator>
      <dc:date>2016-05-26T18:47:32Z</dc:date>
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    <item>
      <title>Re: GPIO Pulldown IMX6SL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/GPIO-Pulldown-IMX6SL/m-p/504990#M81957</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Stephan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;do you want to do it in bareboard code? Modifying directly the registers? In this case you must check the Pad Control Register (IOMUXC_SW_PAD_CTL_PAD_AUD_MCLK). Here you will find the following options for a pin:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P data-canvas-width="16.68" style="font-size: 15px; font-family: sans-serif;"&gt;00 100K_OHM_PD — 100K Ohm Pull Down&lt;/P&gt;&lt;P data-canvas-width="139.21500000000003" style="font-size: 15px; font-family: sans-serif;"&gt;01 47K_OHM_PU — 47K Ohm Pull Up&lt;/P&gt;&lt;P data-canvas-width="147.55500000000004" style="font-size: 15px; font-family: sans-serif;"&gt;10 100K_OHM_PU — 100K Ohm Pull Up&lt;/P&gt;&lt;P data-canvas-width="139.21500000000003" style="font-size: 15px; font-family: sans-serif;"&gt;11 22K_OHM_PU — 22K Ohm Pull Up&lt;/P&gt;&lt;P data-canvas-width="139.21500000000003" style="font-size: 15px; font-family: sans-serif;"&gt;&lt;/P&gt;&lt;P data-canvas-width="139.21500000000003" style="font-size: 15px; font-family: sans-serif;"&gt;If this is not what you are looking for please let me know details of what you need to configure so I can provide more details.&lt;/P&gt;&lt;P data-canvas-width="139.21500000000003" style="font-size: 15px; font-family: sans-serif;"&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Regads,&lt;BR /&gt;Carlos&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 26 May 2016 23:16:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/GPIO-Pulldown-IMX6SL/m-p/504990#M81957</guid>
      <dc:creator>Carlos_Musich</dc:creator>
      <dc:date>2016-05-26T23:16:01Z</dc:date>
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      <title>Re: GPIO Pulldown IMX6SL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/GPIO-Pulldown-IMX6SL/m-p/504991#M81958</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;An internal 100kOhm pull-down resistor can be enabled on most of GPIO pins by appropriately configuring the corresponding IOMUXC_SW_PAD_CTL_PAD_&amp;lt;xxx&amp;gt; register, where &amp;lt;xxx&amp;gt; is the corresponding pin name. The sequence is as follows.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Set the IOMUXC_SW_PAD_CTL_PAD_&amp;lt;xxx&amp;gt;[PUS] bits to 0b00 to select the 100kOhm pull-down resistor.&lt;/P&gt;&lt;P&gt;2. Set the IOMUXC_SW_PAD_CTL_PAD_&amp;lt;xxx&amp;gt;[PUE] bit to 1 to enable the pull resistor (not a keeper circuit).&lt;/P&gt;&lt;P&gt;3. Set the IOMUXC_SW_PAD_CTL_PAD_&amp;lt;xxx&amp;gt;[PKE] bit to 1 to physically enable the pull resistor.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For more information, refer to the Chapter 30 "IOMUX Controller (IOMUXC)" of the i.MX6SoloLite Reference Manual Rev.2 document, available on the i.MX6SoloLite Documentation web page:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fproducts%2Fmicrocontrollers-and-processors%2Farm-processors%2Fi.mx-applications-processors%2Fi.mx-6-processors%2Fi.mx6qp%2Fi.mx-6sololite-processors-single-core-low-power-epd-controller-arm-cortex-a9-core%3Ai.MX6SL%3Ffpsp%3D1%26tab%3DDocumentation_Tab" rel="nofollow" target="_blank"&gt;http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-applications-processors/i.mx-6-processors/i.mx6qp/i.mx-6sololite-processors-single-core-low-power-epd-controller-arm-cortex-a9-core:i.MX6SL?fpsp=1&amp;amp;tab=Documentation_Tab&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Artur&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 30 May 2016 12:13:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/GPIO-Pulldown-IMX6SL/m-p/504991#M81958</guid>
      <dc:creator>art</dc:creator>
      <dc:date>2016-05-30T12:13:09Z</dc:date>
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