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    <title>topic Re: Interfacing Async NAND with iMX6Q in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-Async-NAND-with-iMX6Q/m-p/503975#M81729</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Atilla&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;these signals can be found in Table 29-1. GPMI External Signals&lt;/P&gt;&lt;P&gt;i.MX6DQ Reference Manual &lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.freescale.com/external-link.jspa?url=http%3A%2F%2Fcache.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fref_manual%2FIMX6DQRM.pdf" rel="nofollow" target="_blank"&gt;http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 25 Mar 2016 00:34:05 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2016-03-25T00:34:05Z</dc:date>
    <item>
      <title>Interfacing Async NAND with iMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-Async-NAND-with-iMX6Q/m-p/503974#M81728</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Greetings,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are prepearing a custom HW with an Async Single Die Nand Flash and eMMC. By looking at Sabre for Smart Devices schematics, it is easy to figure out the eMMC connection. We used the&amp;nbsp; same connections as Sabre did. However looking at Sabre AI board for NAND connections, I cant figure where W/R#, CLK/WE# and WP# pins of the NAND Flash should go. Are they meant for GPIO or do they have a designated connection point on imx?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;Mete&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 24 Mar 2016 16:00:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interfacing-Async-NAND-with-iMX6Q/m-p/503974#M81728</guid>
      <dc:creator>atillametetured</dc:creator>
      <dc:date>2016-03-24T16:00:58Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing Async NAND with iMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-Async-NAND-with-iMX6Q/m-p/503975#M81729</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Atilla&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;these signals can be found in Table 29-1. GPMI External Signals&lt;/P&gt;&lt;P&gt;i.MX6DQ Reference Manual &lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.freescale.com/external-link.jspa?url=http%3A%2F%2Fcache.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fref_manual%2FIMX6DQRM.pdf" rel="nofollow" target="_blank"&gt;http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 25 Mar 2016 00:34:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interfacing-Async-NAND-with-iMX6Q/m-p/503975#M81729</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-03-25T00:34:05Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing Async NAND with iMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-Async-NAND-with-iMX6Q/m-p/503976#M81730</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you. I will consider the manual.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Atilla&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 25 Mar 2016 14:36:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interfacing-Async-NAND-with-iMX6Q/m-p/503976#M81730</guid>
      <dc:creator>atillametetured</dc:creator>
      <dc:date>2016-03-25T14:36:16Z</dc:date>
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