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    <title>topic Re: Configuring CCM_CLKO1 as generic clock with 3.10.x kernel in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503616#M81646</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Have you figure out the reason? I am having the same issue.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 17 Dec 2016 15:05:20 GMT</pubDate>
    <dc:creator>femyvarghese</dc:creator>
    <dc:date>2016-12-17T15:05:20Z</dc:date>
    <item>
      <title>Configuring CCM_CLKO1 as generic clock with 3.10.x kernel</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503611#M81641</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello everyone,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;on a custom i.MX6-based board I'm trying to configure the CCM_CLKO1 signal as a generic clock source for an audio codec connected to the SSI interface. I have modified the device tree setting the pinmux as reported below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;amp;i2c2 {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; codec: tlv320aic3x@18 {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "ti,tlv320aic3x";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; reg = &amp;lt;0x18&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; clocks = &amp;lt;&amp;amp;clks 169&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; AVDD-supply = &amp;lt;&amp;amp;reg_3p3v&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; IOVDD-supply = &amp;lt;&amp;amp;reg_3p3v&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DRVDD-supply = &amp;lt;&amp;amp;reg_3p3v&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DVDD-supply = &amp;lt;&amp;amp;reg_1p8v&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;amp;iomuxc {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; tlv320aic3x {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl_tlv320aic3x_1: tlv320aic3x_codecgrp-1{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; fsl,pins = &amp;lt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x130b0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x130b0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;amp;ssi1 {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;amp;audmux {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-names = "default";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_tlv320aic3x_1&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the "codec" device tree entry, I've added the&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;clocks = &amp;lt;&amp;amp;clks 169&amp;gt;;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;property, which in my understanding should select the cko1 signal as the master clock.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately, I don't see any activity on the CSI0_MCLK/CCM_CLKO1 pin. I've checked the device tree hierarchy to make sure that no other peripherals are using that pin. I've also tried adding the following code to the arch/arm/mach-imx/clk-imx6q.c file&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;printk("Trying to set CLKO1...\n");&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ret = clk_set_parent(clk[cko1_sel], clk[pll4_audio_div]);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (!ret){&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt; &lt;/TD&gt;&lt;TD&gt;ret = clk_set_parent(clk[cko], clk[cko1]);&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt; &lt;/TD&gt;&lt;TD&gt;printk("CLKO1 set parent\n");&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (ret)&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt; &lt;/TD&gt;&lt;TD&gt;pr_warn("failed to set up CLKO1: %d\n", ret);&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;in the same way that cko2 is configured, but still with no luck and I'm wondering how I'm doing wrong..&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could someone help me understand which are the required steps to correctly configure the CCM_CLKO1 signal?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any help will be greatly appreciated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks and best regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Piero Pezzin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 11 Feb 2016 08:56:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503611#M81641</guid>
      <dc:creator>pieropezzin</dc:creator>
      <dc:date>2016-02-11T08:56:07Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring CCM_CLKO1 as generic clock with 3.10.x kernel</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503612#M81642</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, &lt;/P&gt;&lt;P&gt; On which part are you selecting the clock option made in the CCM_CCOSR register? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_0.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/53289iFC2AA9385B0E9D78/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_0.png" alt="pastedImage_0.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Alejandro&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 15 Feb 2016 15:52:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503612#M81642</guid>
      <dc:creator>alejandrolozan1</dc:creator>
      <dc:date>2016-02-15T15:52:52Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring CCM_CLKO1 as generic clock with 3.10.x kernel</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503613#M81643</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Sorry, I just realized you have the code in the clk-imx6q.c. &lt;/P&gt;&lt;P&gt;Can you double check the contents of the registers? You can use the unit_tests for such task, memtool or the dump-clocks.sh utility may be helpful. &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 15 Feb 2016 16:34:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503613#M81643</guid>
      <dc:creator>alejandrolozan1</dc:creator>
      <dc:date>2016-02-15T16:34:11Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring CCM_CLKO1 as generic clock with 3.10.x kernel</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503614#M81644</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;ok, I'll try checking the registers as soon as I have some time to work on it. However, are you suggesting that configuring the device tree and adding that code in clk-imx6q.c is not enough, and there is something missing somewhere? Or are there errors in my code?&lt;/P&gt;&lt;P&gt;Thanks for your help and best regards.&lt;/P&gt;&lt;P&gt;Piero Pezzin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Feb 2016 08:01:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503614#M81644</guid>
      <dc:creator>pieropezzin</dc:creator>
      <dc:date>2016-02-16T08:01:22Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring CCM_CLKO1 as generic clock with 3.10.x kernel</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503615#M81645</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am suggesting that there might be something missing and looking at the regsiter contents may be helpful to narrow down the problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Alejandro&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Feb 2016 02:03:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503615#M81645</guid>
      <dc:creator>alejandrolozan1</dc:creator>
      <dc:date>2016-02-17T02:03:06Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring CCM_CLKO1 as generic clock with 3.10.x kernel</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503616#M81646</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Have you figure out the reason? I am having the same issue.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 17 Dec 2016 15:05:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-CCM-CLKO1-as-generic-clock-with-3-10-x-kernel/m-p/503616#M81646</guid>
      <dc:creator>femyvarghese</dc:creator>
      <dc:date>2016-12-17T15:05:20Z</dc:date>
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