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    <title>topic Re: Configuring the kernel for RC/EP communication in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-the-kernel-for-RC-EP-communication/m-p/502564#M81367</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;&amp;nbsp; Generally i.MX6 Linux BSP supports PCie Root Complex mode,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;as described in Chapter 41 (i.MX 6 PCI Express Root Complex Driver)&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;of the recent BSP. Just for tests, BSP may support one endpoint function,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;which is enabled via the config option CONFIG_IMX_PCIE_EP_MODE_IN_EP_RC_SYS.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;You may try to enable the config option &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;"CONFIG_IMX_PCIE_EP_MODE_IN_EP_RC_SYS=y".&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; Also the following may be helpful.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;&lt;A href="https://community.nxp.com/thread/376369"&gt;Changing the Kernel configuration for i.MX6 SABRE&lt;/A&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 11 Mar 2016 09:17:08 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2016-03-11T09:17:08Z</dc:date>
    <item>
      <title>Configuring the kernel for RC/EP communication</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-the-kernel-for-RC-EP-communication/m-p/502563#M81366</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am trying to implement implement a pcie connection between two iMX6 based cards.&lt;/P&gt;&lt;P&gt;I saw the article about EC/RC validation which refers to an older kernel and cannot be used as is on the kernel I am using 3.14.60&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can someone please explain the proper use of:&lt;/P&gt;&lt;P&gt;CONFIG_RC_MODE_IN_EP_RC_SYS&lt;/P&gt;&lt;P&gt;CONFIG_EP_MODE_IN_EP_RC_SYS&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Mar 2016 14:20:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-the-kernel-for-RC-EP-communication/m-p/502563#M81366</guid>
      <dc:creator>sebastiancabot</dc:creator>
      <dc:date>2016-03-02T14:20:34Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring the kernel for RC/EP communication</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-the-kernel-for-RC-EP-communication/m-p/502564#M81367</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;&amp;nbsp; Generally i.MX6 Linux BSP supports PCie Root Complex mode,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;as described in Chapter 41 (i.MX 6 PCI Express Root Complex Driver)&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;of the recent BSP. Just for tests, BSP may support one endpoint function,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;which is enabled via the config option CONFIG_IMX_PCIE_EP_MODE_IN_EP_RC_SYS.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;You may try to enable the config option &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;"CONFIG_IMX_PCIE_EP_MODE_IN_EP_RC_SYS=y".&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; Also the following may be helpful.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&lt;SPAN class="tm5"&gt;&lt;A href="https://community.nxp.com/thread/376369"&gt;Changing the Kernel configuration for i.MX6 SABRE&lt;/A&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="a______"&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 11 Mar 2016 09:17:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-the-kernel-for-RC-EP-communication/m-p/502564#M81367</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-03-11T09:17:08Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring the kernel for RC/EP communication</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-the-kernel-for-RC-EP-communication/m-p/502565#M81368</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri.&lt;/P&gt;&lt;P&gt;What does the CONFIG_RC_MODE_IN_EP_RC_SYS do?&lt;/P&gt;&lt;P&gt;Does this one have to be set if I want the ARM to run in root complex mode?&lt;/P&gt;&lt;P&gt;I just want to be able to communicate between the ARM and one external EP. I assume I still need to set the ARM in RC mode?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Niklas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 19 Jan 2017 22:35:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-the-kernel-for-RC-EP-communication/m-p/502565#M81368</guid>
      <dc:creator>niklasmolin</dc:creator>
      <dc:date>2017-01-19T22:35:31Z</dc:date>
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