topic IMX6Dual boot up issue in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/IMX6Dual-boot-up-issue/m-p/502540#M81354 <HTML><HEAD></HEAD><BODY><P>Hi,</P><P>We have a design that is using the MCIMX6U5DVM10AC device with PMIC MMPF0100F0AEP. We build 3 times pilot runs, however there is a serious problem right now. In some machines it get 1/350 chance to shut down on U-boot , and some machines seem to boot up always very well. so we trace the code to see which instruction is the shut down point. the shut down point is "read" a clock for IPU usage. it even not a "write "instruction but "read"&nbsp; and shut down in the same one point everytime.</P><P>Is anyone who also meet this issue, or someone who can tell us what direction we can go for debugging. Many thanks!</P></BODY></HTML> Wed, 23 Dec 2015 09:02:10 GMT raehsu 2015-12-23T09:02:10Z IMX6Dual boot up issue https://community.nxp.com/t5/i-MX-Processors/IMX6Dual-boot-up-issue/m-p/502540#M81354 <HTML><HEAD></HEAD><BODY><P>Hi,</P><P>We have a design that is using the MCIMX6U5DVM10AC device with PMIC MMPF0100F0AEP. We build 3 times pilot runs, however there is a serious problem right now. In some machines it get 1/350 chance to shut down on U-boot , and some machines seem to boot up always very well. so we trace the code to see which instruction is the shut down point. the shut down point is "read" a clock for IPU usage. it even not a "write "instruction but "read"&nbsp; and shut down in the same one point everytime.</P><P>Is anyone who also meet this issue, or someone who can tell us what direction we can go for debugging. Many thanks!</P></BODY></HTML> Wed, 23 Dec 2015 09:02:10 GMT https://community.nxp.com/t5/i-MX-Processors/IMX6Dual-boot-up-issue/m-p/502540#M81354 raehsu 2015-12-23T09:02:10Z