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    <title>topic Question, i.MX6SL iRAM usage in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-iRAM-usage/m-p/502431#M81334</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about the use of OCRAM of i.MX6SL.&lt;/P&gt;&lt;P&gt;My customer is thinking about the use of OCRAM for their own boot loader.&lt;/P&gt;&lt;P&gt;They are trying to develop their own boot loader program which is loaded into OCRAM free area from boot device and it runs on OCRAM.&lt;/P&gt;&lt;P&gt;They think that they can use 24KB of ‘MMU Table’ area (0x00918000- 0x0091DFFF) in OCRAM after the first boot procedure by iROM code has completed.&lt;/P&gt;&lt;P&gt;That is, they can disable MMU at the start of their own bootloader execution. Then they can use the ‘MMU table’ area for their own program.&lt;/P&gt;&lt;P&gt;Is it true?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 14 Apr 2016 04:47:17 GMT</pubDate>
    <dc:creator>Aemj</dc:creator>
    <dc:date>2016-04-14T04:47:17Z</dc:date>
    <item>
      <title>Question, i.MX6SL iRAM usage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-iRAM-usage/m-p/502431#M81334</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about the use of OCRAM of i.MX6SL.&lt;/P&gt;&lt;P&gt;My customer is thinking about the use of OCRAM for their own boot loader.&lt;/P&gt;&lt;P&gt;They are trying to develop their own boot loader program which is loaded into OCRAM free area from boot device and it runs on OCRAM.&lt;/P&gt;&lt;P&gt;They think that they can use 24KB of ‘MMU Table’ area (0x00918000- 0x0091DFFF) in OCRAM after the first boot procedure by iROM code has completed.&lt;/P&gt;&lt;P&gt;That is, they can disable MMU at the start of their own bootloader execution. Then they can use the ‘MMU table’ area for their own program.&lt;/P&gt;&lt;P&gt;Is it true?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Apr 2016 04:47:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-iRAM-usage/m-p/502431#M81334</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2016-04-14T04:47:17Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX6SL iRAM usage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-iRAM-usage/m-p/502432#M81335</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Yes, Your understanding is correct.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Apr 2016 04:52:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6SL-iRAM-usage/m-p/502432#M81335</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-04-14T04:52:24Z</dc:date>
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