<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>i.MX ProcessorsのトピックRe: custom imx6q board bring up problem</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501509#M81169</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Maxim&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can attach jtag debugger as described in i.MX6 System Development User’s Guide&lt;/P&gt;&lt;P&gt;Chapter 7 Configuring JTAG Tools, use board scripts from ddr test link,&lt;/P&gt;&lt;P&gt;update script with own init ddr codes. Then try read/write from some memory address,&lt;/P&gt;&lt;P&gt;observing ddr signals with oscilloscope.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 03 Mar 2016 01:01:43 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2016-03-03T01:01:43Z</dc:date>
    <item>
      <title>custom imx6q board bring up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501505#M81165</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;BR /&gt;Hi!&lt;/P&gt;&lt;P&gt;I'm trying to bring up a custom imx6q board using JTAG, because it has only NAND for booting and no SD connector attached. The design has imx6q and two DDR3 chips (MT41J256M16HA-125:E) populated. First of all I try to use the DDR stress test tool v2.40 to test and calibrate DDR3 memory. The test I took from here:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-105652"&gt;i.MX6/7 DDR Stress Test Tool V2.40&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It starts, I can choose options but then it hangs. I don't know why and where in the code. I don't the sources.&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DDR Stress Test (2.4.0)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Build: Dec 11 2015, 11:09:30&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Freescale Semiconductor, Inc.&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip ID&lt;/P&gt;&lt;P&gt;CHIP ID = i.MX6 Dual/Quad (0x63)&lt;/P&gt;&lt;P&gt;Internal Revision = TO1.5&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Boot Configuration&lt;/P&gt;&lt;P&gt;SRC_SBMR1(0x020d8004) = 0x00003050&lt;/P&gt;&lt;P&gt;SRC_SBMR2(0x020d801c) = 0x22000001&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What ARM core speed would you like to run?&lt;/P&gt;&lt;P&gt;Type 1 for 800MHz, 2 for 1GHz, 3 for 1.2GHz&lt;/P&gt;&lt;P&gt;ARM Clock set to 1GHz&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DDR configuration&lt;/P&gt;&lt;P&gt;BOOT_CFG3[5-4]: 0x00, Single DDR channel.&lt;/P&gt;&lt;P&gt;DDR type is DDR3&lt;/P&gt;&lt;P&gt;Data width: 32, bank num: 8&lt;/P&gt;&lt;P&gt;Row size: 14, col size: 10&lt;/P&gt;&lt;P&gt;No chip select is enabled&lt;/P&gt;&lt;P&gt;Density per chip select: 512MB&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Current Tempareture: 31&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please select the DDR density per chip select (in bytes) on the board&lt;/P&gt;&lt;P&gt;Type 0 for 2GB; 1 for 1GB; 2 for 512MB; 3 for 256MB; 4 for 128MB; 5 for 64MB; 6 for 32MB&lt;/P&gt;&lt;P&gt;For maximum supported density (4GB), we can only access up to 3.75GB.&amp;nbsp; Type 7 to select this&lt;/P&gt;&lt;P&gt;&amp;nbsp; DDR density selected (MB): 512&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Would do you want run DDR Calibration? Type 'y' to run and 'n' to skip&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Calibration will run at DDR frequency 528MHz. Type 'y' to continue.&lt;/P&gt;&lt;P&gt;If you want to run at other DDR frequency. Type 'n'&lt;/P&gt;&lt;P&gt;Enter the DDR frequency for calibration [350MHz to 528MHz]:&lt;/P&gt;&lt;P&gt;350&lt;/P&gt;&lt;P&gt;&amp;nbsp; The freq you entered was: 350&lt;/P&gt;&lt;P&gt;&amp;nbsp; Please enter the MR1 value on the initilization script&lt;/P&gt;&lt;P&gt;&amp;nbsp; This will be re-programmed into MR1 after write leveling calibration&lt;/P&gt;&lt;P&gt;&amp;nbsp; Enter as a 4-digit HEX value, example 0004, then hit enter&lt;/P&gt;&lt;P&gt;0004DDR Freq: 352 MHz&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ddr_mr1=0x00000004&lt;/P&gt;&lt;P&gt;Start write leveling calibration...&lt;/P&gt;&lt;P&gt;running Write level HW calibration&lt;/P&gt;&lt;P&gt;Write leveling calibration completed, update the following registers in your initialization script&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x00010001&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MMDC_MPWLDECTRL1 ch0 (0x021b0810) = 0x00010001&lt;/P&gt;&lt;P&gt;Write DQS delay result:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Write DQS0 delay: 1/256 CK&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Write DQS1 delay: 1/256 CK&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Write DQS2 delay: 1/256 CK&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Write DQS3 delay: 1/256 CK&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please suggest what to do next&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Mar 2016 10:02:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501505#M81165</guid>
      <dc:creator>maximpodberezni</dc:creator>
      <dc:date>2016-03-02T10:02:25Z</dc:date>
    </item>
    <item>
      <title>Re: custom imx6q board bring up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501506#M81166</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Maxim&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;suggest also try older version&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" data-containerid="2004" data-containertype="14" data-content-finding="Community" data-objectid="96412" data-objecttype="102" href="https://community.nxp.com/docs/DOC-96412"&gt;i.MX6 DDR Stress Test Tool V1.0.3&lt;/A&gt;&lt;/P&gt;&lt;P&gt;then run simple read/write test with jtag and check if board&lt;/P&gt;&lt;P&gt;hangs. Recommended to check Chapter 8 Avoiding Board Bring-up Problems&lt;/P&gt;&lt;P&gt;i.MX6 System Development User’s Guide&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.freescale.com/external-link.jspa?url=http%3A%2F%2Fcache.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fuser_guide%2FIMX6DQ6SDLHDG.pdf" rel="nofollow" target="_blank"&gt;http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Mar 2016 12:08:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501506#M81166</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-03-02T12:08:51Z</dc:date>
    </item>
    <item>
      <title>Re: custom imx6q board bring up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501507#M81167</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor!&lt;/P&gt;&lt;P&gt;Thank you for your help!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1.0.3 works even worse because it hangs right here:&lt;/P&gt;&lt;P&gt;******************************&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DDR Stress Test (1.0.3) for MX6DQ&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Build: Sep 18 2014, 11:11:44&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Freescale Semiconductor, Inc.&lt;/P&gt;&lt;P&gt;******************************&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;=======DDR configuration==========&lt;/P&gt;&lt;P&gt;BOOT_CFG3[5-4]: 0x00, Single DDR channel.&lt;/P&gt;&lt;P&gt;DDR type is DDR3&lt;/P&gt;&lt;P&gt;Data width: 32, bank num: 8&lt;/P&gt;&lt;P&gt;Row size: 14, col size: 10&lt;/P&gt;&lt;P&gt;No chip select is enabled&lt;/P&gt;&lt;P&gt;Density per chip select: 512MB&lt;/P&gt;&lt;P&gt;==================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What ARM core speed would you like to run?&lt;/P&gt;&lt;P&gt;Type 0 for 650MHz, 1 for 800MHz, 2 for 1GHz, 3 for 1.2GHz&lt;/P&gt;&lt;P&gt;&amp;nbsp; ARM set to 1GHz&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please select the DDR density per chip select (in bytes) on the board&lt;/P&gt;&lt;P&gt;Type 0 for 2GB; 1 for 1GB; 2 for 512MB; 3 for 256MB; 4 for 128MB; 5 for 64MB; 6 for 32MB&lt;/P&gt;&lt;P&gt;For maximum supported density (4GB), we can only access up to 3.75GB.&amp;nbsp; Type 9 to select this&lt;/P&gt;&lt;P&gt;&amp;nbsp; DDR density selected (MB): 64&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Calibration will run at DDR frequency 528MHz. Type 'y' to continue.&lt;/P&gt;&lt;P&gt;If you want to run at other DDR frequency. Type 'n'&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;please tell how to do simple memory read/writes with JTAG&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Mar 2016 13:31:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501507#M81167</guid>
      <dc:creator>maximpodberezni</dc:creator>
      <dc:date>2016-03-02T13:31:55Z</dc:date>
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    <item>
      <title>Re: custom imx6q board bring up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501508#M81168</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I can see that when I run tests the tool reports:&lt;/P&gt;&lt;P&gt;BOOT_CFG3[5-4]: 0x00, Single DDR channel.&lt;/P&gt;&lt;P&gt;DDR type is DDR3&lt;/P&gt;&lt;P&gt;Data width: 32, bank num: 8&lt;/P&gt;&lt;P&gt;Row size: 14, col size: 10&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;No chip select is enabled&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Density per chip select: 512MB&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;while I saw other logs where CS0 used:&lt;/P&gt;&lt;P&gt;Chip select CSD0 is used&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How can I enable CS0?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Mar 2016 14:46:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501508#M81168</guid>
      <dc:creator>maximpodberezni</dc:creator>
      <dc:date>2016-03-02T14:46:41Z</dc:date>
    </item>
    <item>
      <title>Re: custom imx6q board bring up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501509#M81169</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Maxim&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can attach jtag debugger as described in i.MX6 System Development User’s Guide&lt;/P&gt;&lt;P&gt;Chapter 7 Configuring JTAG Tools, use board scripts from ddr test link,&lt;/P&gt;&lt;P&gt;update script with own init ddr codes. Then try read/write from some memory address,&lt;/P&gt;&lt;P&gt;observing ddr signals with oscilloscope.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Mar 2016 01:01:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501509#M81169</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-03-03T01:01:43Z</dc:date>
    </item>
    <item>
      <title>Re: custom imx6q board bring up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501510#M81170</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor!&lt;/P&gt;&lt;P&gt;I don't like the message that "&lt;SPAN style="font-weight: bold; font-size: 14px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;No chip select is enabled"&lt;/SPAN&gt;&lt;SPAN style="font-size: 14px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt; in the stress tool. I'm pretty sure the problem lies here. Where should it be enabled?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Mar 2016 06:22:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501510#M81170</guid>
      <dc:creator>maximpodberezni</dc:creator>
      <dc:date>2016-03-03T06:22:40Z</dc:date>
    </item>
    <item>
      <title>Re: custom imx6q board bring up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501511#M81171</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;By the way I tried to request the sources of the DDR3 stress tool with Avnet representative, but NXP refused to. Will try to figure out what is wrong myself&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Mar 2016 17:45:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/custom-imx6q-board-bring-up-problem/m-p/501511#M81171</guid>
      <dc:creator>maximpodberezni</dc:creator>
      <dc:date>2016-03-03T17:45:13Z</dc:date>
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