i.MX6 Dual6Quad,sabre-sd，How to enable PCIe EndPoint Mode?

xexerse — Thu, 24 Mar 2016 10:13:28 GMT

Hello everyone.

I get a problem about the PCIe EP mode.

I use a i.MX6 Dual6Quad board and i want set it as a PCIE endpoint device.

I select PCI Express support and PCI Express EP mode in the IMX6 RC/EP interconnection systeｍ.

But I get a boot problem like this:

U-Boot 2009.08 (10月 08 2015 - 16:22:43)

CPU: Freescale i.MX6 family TO1.2 at 792 MHz

Thermal sensor with ratio = 181

Temperature: 27 C, calibration data 0x57b4c57d

mx6q pll1: 792MHz

mx6q pll2: 528MHz

mx6q pll3: 480MHz

mx6q pll8: 50MHz

ipg clock : 66000000Hz

ipg per clock : 66000000Hz

uart clock : 80000000Hz

cspi clock : 60000000Hz

ahb clock : 132000000Hz

axi clock : 264000000Hz

emi_slow clock: 132000000Hz

ddr clock : 528000000Hz

usdhc1 clock : 198000000Hz

usdhc2 clock : 198000000Hz

usdhc3 clock : 198000000Hz

usdhc4 clock : 198000000Hz

nfc clock : 24000000Hz

Board: i.MX6Q-SABRESD: unknown-board Board: 0x63012 [POR ]

Boot Device: SPI NOR

I2C: ready

DRAM: 2 GB

MMC: FSL_USDHC: 0,FSL_USDHC: 1,FSL_USDHC: 2

JEDEC ID: 0x20:0x20:0x16

*** Warning - bad CRC, using default environment

In: serial

Out: serial

Err: serial

Net: got MAC address from IIM: 00:00:00:00:00:00

FEC0 [PRIME]

Hit any key to stop autoboot: 0

mmc2(part 0) is current device

MMC read: dev # 2, block # 2048, count 8192 ... 8192 blocks read: OK

## Booting kernel from Legacy Image at 10800000 ...

Image Name: Linux-3.0.35-2666-gbdde708

Image Type: ARM Linux Kernel Image (uncompressed)

Data Size: 3939476 Bytes = 3.8 MB

Load Address: 10008000

Entry Point: 10008000

Verifying Checksum ... OK

Loading Kernel Image ... OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.

Linux version 3.0.35-2666-gbdde708 (xexerse@ubuntu) (gcc version 4.6.2 20110630 (prerelease) (Freescale MAD -- Linaro 2011.07 -- Built at 2011/08/10 09:20) ) #3 SMP PREEMPT Thu Mar 24 09:39:43 CST 2016

CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d

CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache

Machine: Freescale i.MX 6Quad/DualLite/Solo Sabre-SD Board

Ignoring unrecognised tag 0x54410008

Memory policy: ECC disabled, Data cache writealloc

CPU identified as i.MX6Q, silicon rev 1.2

PERCPU: Embedded 7 pages/cpu @8c80e000 s5440 r8192 d15040 u32768

Built 1 zonelists in Zone order, mobility grouping on. Total pages: 454656

Kernel command line: console=ttymxc0,115200 console=ttymxc0,115200 console=ttymxc0,115200 video=mxcfb0:dev=ldb,LDB-XGA,if=RGB666 ldb=sep1 video=mxcfb1:dev=lcd,ZXSM-VGA,if=RGB24 root=/dev/mmcblk0p1 rootwait

PID hash table entries: 4096 (order: 2, 16384 bytes)

Dentry cache hash table entries: 262144 (order: 8, 1048576 bytes)

Inode-cache hash table entries: 131072 (order: 7, 524288 bytes)

Memory: 512MB 1280MB = 1792MB total

Memory: 1805200k/1805200k available, 291952k reserved, 360448K highmem

Virtual kernel memory layout:

vector : 0xffff0000 - 0xffff1000 ( 4 kB)

fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)

DMA : 0xf4600000 - 0xffe00000 ( 184 MB)

vmalloc : 0xea800000 - 0xf2000000 ( 120 MB)

lowmem : 0x80000000 - 0xea000000 (1696 MB)

pkmap : 0x7fe00000 - 0x80000000 ( 2 MB)

modules : 0x7f000000 - 0x7fe00000 ( 14 MB)

.init : 0x80008000 - 0x8003d000 ( 212 kB)

.text : 0x8003d000 - 0x80ab5728 (10722 kB)

.data : 0x80ab6000 - 0x80b19f80 ( 400 kB)

.bss : 0x80b19fa4 - 0x80b6840c ( 314 kB)

SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1

Preemptible hierarchical RCU implementation.

NR_IRQS:624

MXC GPIO hardware

sched_clock: 32 bits at 3000kHz, resolution 333ns, wraps every 1431655ms

arm_max_freq=1GHz

MXC_Early serial console at MMIO 0x2020000 (options '115200')

bootconsole [ttymxc0] enabled

Console: colour dummy device 80x30

Calibrating delay loop... 1581.05 BogoMIPS (lpj=7905280)

pid_max: default: 32768 minimum: 301

Mount-cache hash table entries: 512

CPU: Testing write buffer coherency: ok

hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available

CPU1: Booted secondary processor

CPU2: Booted secondary processor

CPU3: Booted secondary processor

Brought up 4 CPUs

SMP: Total of 4 processors activated (6324.22 BogoMIPS).

print_constraints: dummy:

NET: Registered protocol family 16

print_constraints: vddpu: 725 <--> 1300 mV at 700 mV fast normal

print_constraints: vddcore: 725 <--> 1300 mV at 1150 mV fast normal

print_constraints: vddsoc: 725 <--> 1300 mV at 1200 mV fast normal

print_constraints: vdd2p5: 2000 <--> 2775 mV at 2400 mV fast normal

print_constraints: vdd1p1: 800 <--> 1400 mV at 1100 mV fast normal

print_constraints: vdd3p0: 2625 <--> 3400 mV at 3000 mV fast normal

vmap allocation for size 134221824 failed: use vmalloc=<size> to increase size.

hw-breakpoint: found 6 breakpoint and 1 watchpoint registers.

hw-breakpoint: 1 breakpoint(s) reserved for watchpoint single-step.

hw-breakpoint: maximum watchpoint size is 4 bytes.

L310 cache controller enabled

l2x0: 16 ways, CACHE_ID 0x410000c7, AUX_CTRL 0x02070000, Cache size: 1048576 B

bio: create slab <bio-0> at 0

mxs-dma mxs-dma-apbh: initialized

print_constraints: SPKVDD: 4200 mV

print_constraints: 1_8V: 1800 mV

print_constraints: MICVDD: 3300 mV

print_constraints: vmmc: 3300 mV

vgaarb: loaded

SCSI subsystem initialized

spi_imx imx6q-ecspi.0: probed

spi_imx imx6q-ecspi.1: probed

usbcore: registered new interface driver usbfs

usbcore: registered new interface driver hub

usbcore: registered new device driver usb

Freescale USB OTG Driver loaded, $Revision: 1.55 $

imx-ipuv3 imx-ipuv3.0: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)

imx-ipuv3 imx-ipuv3.1: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)

mxc_mipi_csi2 mxc_mipi_csi2: i.MX MIPI CSI2 driver probed

mxc_mipi_csi2 mxc_mipi_csi2: i.MX MIPI CSI2 dphy version is 0x3130302a

MIPI CSI2 driver module loaded

Advanced Linux Sound Architecture Driver Version 1.0.24.

Bluetooth: Core ver 2.16

NET: Registered protocol family 31

Bluetooth: HCI device and connection manager initialized

Bluetooth: HCI socket layer initialized

Bluetooth: L2CAP socket layer initialized

Bluetooth: SCO socket layer initialized

cfg80211: Calling CRDA to update world regulatory domain

max17135 2-0048: PMIC MAX17135 for eInk display

i2c-core: driver [max17135] using legacy suspend method

i2c-core: driver [max17135] using legacy resume method

Switching to clocksource mxc_timer1

NET: Registered protocol family 2

IP route cache hash table entries: 65536 (order: 6, 262144 bytes)

TCP established hash table entries: 262144 (order: 9, 2097152 bytes)

TCP bind hash table entries: 65536 (order: 7, 786432 bytes)

TCP: Hash tables configured (established 262144 bind 65536)

TCP reno registered

UDP hash table entries: 1024 (order: 3, 32768 bytes)

UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes)

NET: Registered protocol family 1

RPC: Registered named UNIX socket transport module.

RPC: Registered udp transport module.

RPC: Registered tcp transport module.

RPC: Registered tcp NFSv4.1 backchannel transport module.

PMU: registered new PMU device of type 0

Static Power Management for Freescale i.MX6

wait mode is enabled for i.MX6

cpaddr = ea880000 suspend_iram_base=ea8f4000

PM driver module loaded

iMX6 PCIe PCIe EP mode imx_pcie_pltfm_probe entering.

PCIE: imx_pcie_pltfm_probe start link up.

PCIe EP: waiting for link up...

Here is the source code in kernel:

pr_info("PCIe EP: waiting for link up...\n");

/* link is debug bit 36 debug 1 start in bit 32 */

do {

usleep_range(10, 20);

} while ((readl(dbi_base + DB_R1) & 0x10) == 0);

/* Make sure that the PCIe link is up */

if (imx_pcie_link_up(dbi_base)) {

pr_info("PCIe EP: link up.\n");

} else {

pr_info("PCIe EP: ERROR link is down, exit!\n");

where can i get the definition of the pci registers?

In "i.MX 6Dual/6Quad Applications Processor Reference Manual" ，i only find the PCIe CTRL EP Mode Memory Map/Register Definition .

Can anybody help me? I'm new about this.

Re: i.MX6 Dual6Quad,sabre-sd，How to enable PCIe EndPoint Mode?

igorpadykov — Fri, 25 Mar 2016 00:37:49 GMT

please check attached Linux Manual sect.35.2.2 Kernel configurations,

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf

Best regards

igor

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Re: i.MX6 Dual6Quad,sabre-sd，How to enable PCIe EndPoint Mode?

xexerse — Fri, 25 Mar 2016 09:17:29 GMT

Thank you very much.

I study the Manual,and I have new questions.

The hardware schematic diagram is shown as:

I select PCI Express support and PCI Express RC mode in the IMX6 RC/EP interconnection systeｍ, and the boot log is like this:

iMX6 PCIe PCIe RC mode imx_pcie_pltfm_probe entering.

PCIE: imx_pcie_pltfm_probe start link up.

link up failed, DB_R0:0x00cb4200, DB_R1:0x08200000!

IMX PCIe port: link down!

I select PCI Express support and PCI Express EP mode in the IMX6 RC/EP interconnection systeｍ, and DBR1 is always 0x08200000.

If I do not link any device in IMX6 PCIE side, does it always link down?

And is there any possible reason why DBR1 always being 0x08200000?

i.MX ProcessorsのトピックRe: i.MX6 Dual6Quad,sabre-sd，How to enable PCIe EndPoint Mode?

i.MX6 Dual6Quad,sabre-sd，How to enable PCIe EndPoint Mode?

Re: i.MX6 Dual6Quad,sabre-sd，How to enable PCIe EndPoint Mode?

Re: i.MX6 Dual6Quad,sabre-sd，How to enable PCIe EndPoint Mode?