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    <title>topic Re: i.MX6 dte-mode doesn't transmit chars on UART in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499708#M80701</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;At last I understood the behaviour and solved the problem.&lt;/P&gt;&lt;P&gt;This post explains everything perfectly: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-97509"&gt;https://community.freescale.com/docs/DOC-97509&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Be careful: dte-mode swaps &lt;STRONG&gt;RTS/CTS&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="text-decoration: underline;"&gt;and TX/RX&lt;/STRONG&gt; pins&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 16 May 2016 13:58:18 GMT</pubDate>
    <dc:creator>marcocavallini</dc:creator>
    <dc:date>2016-05-16T13:58:18Z</dc:date>
    <item>
      <title>i.MX6 dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499700#M80693</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I already started a similar thread and I've read a plenty of documents saying that &lt;STRONG&gt;dte-mode&lt;/STRONG&gt; switches &lt;STRONG&gt;RTS/CTS&lt;/STRONG&gt; signals on the CPU pins (MUX).&lt;/P&gt;&lt;P&gt;Okay, let's suppose that it is true despite the evidence demonstrate the opposite, and I can explain why.&lt;/P&gt;&lt;P&gt;I tested this with linux kernel 3.14.28 and 4.1.15 and 4.5.2 without success.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt;&lt;STRONG&gt;My questions are: &lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN style="color: #303030;"&gt;&lt;STRONG&gt;Why if I set fsl,uart-has-rtscts; + fsl,dte-mode; the UART manages the RTS signal during my serial transmission but there are no chars going out from the TX pin?&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="color: #303030;"&gt;&lt;STRONG&gt;Is there any silicon bug in this CPU or any special CPU setting, to have RTS/CTS signals working when I transmit chars?&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt;Is there any NXP/Freescale engineer, FAE, specialist out there able to explain this behaviour?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt;P.S. If you need more details on this, please read this thread and the links inside it: &lt;A _jive_internal="true" href="https://community.nxp.com/thread/390320"&gt;https://community.freescale.com/thread/390320&lt;/A&gt;​&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt;I already tested it monitoring the RTS and CTS signals with a scope and connecting RTS with CTS on the port I am using (&amp;amp;uart3 = /dev/ttymxc2).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt;Thank you in advance.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 May 2016 10:08:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499700#M80693</guid>
      <dc:creator>marcocavallini</dc:creator>
      <dc:date>2016-05-04T10:08:13Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499701#M80694</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Looks like You need to use DTE mode, assuming all UART signals are inverted.&lt;/P&gt;&lt;P&gt;In such case also it is needed to configure IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 May 2016 08:26:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499701#M80694</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-05-05T08:26:41Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499702#M80695</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; is it possible to try UART tests from the i.MX Platform SDK ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 May 2016 08:39:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499702#M80695</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-05-05T08:39:16Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499703#M80696</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Yuri,&lt;/P&gt;&lt;P&gt;thank you for answering.&lt;/P&gt;&lt;P&gt;I wonder how to set that from the DeviceTree point of view.&lt;/P&gt;&lt;P&gt;I argue it is a matter of using&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;#define MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x164 0x534 0x000 0x2 0x0&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;#define MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x164 0x534 0x90c 0x2 0x0&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Considering that I am using these settings&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;pinctrl_uart3_mh: uart3grp-mh {&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; fsl,pins = &amp;lt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_D23__UART3_CTS_B&amp;nbsp;&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_D31__UART3_RTS_B&amp;nbsp;&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;gt;;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;};&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;but as you can read in my other post, I already tried these settings with the same result: no TX data&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;// DCE mode : standard&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_CTS_B&amp;nbsp;&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_RTS_B&amp;nbsp;&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;// DTE mode : requires fsl,dte-mode; (RTS/CTS inverted)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_RTS_B&amp;nbsp;&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_CTS_B&amp;nbsp;&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;// DTE mode : requires fsl,dte-mode; (all inverted)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_RTS_B&amp;nbsp;&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_CTS_B&amp;nbsp;&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you please clarify?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 May 2016 09:45:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499703#M80696</guid>
      <dc:creator>marcocavallini</dc:creator>
      <dc:date>2016-05-05T09:45:01Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499704#M80697</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I tested this with linux kernel 3.14.28 and 4.1.15 coming from NXP/Freescale BSP without success.&lt;/P&gt;&lt;P&gt;&lt;A href="http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/refs/heads"&gt;http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/refs/heads&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 May 2016 09:49:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499704#M80697</guid>
      <dc:creator>marcocavallini</dc:creator>
      <dc:date>2016-05-05T09:49:05Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499705#M80698</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I've also the same problem. I think that you don't consider this as answered....&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 May 2016 10:04:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499705#M80698</guid>
      <dc:creator>valeriobardelli</dc:creator>
      <dc:date>2016-05-05T10:04:24Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499706#M80699</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I wonder why this question is assumed answered. :smileyshocked:&lt;/P&gt;&lt;P&gt;It isn't and I have an update for you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Independently from the setting of fsl,dte-mode; in the DT,&lt;/P&gt;&lt;P&gt;so I have not enabled it and I am working in DCE mode (iMX6 default).&lt;/P&gt;&lt;P&gt;I see the behaviour below using Kernel linux-4.5.2.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Case #1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;-----------------------------------------------------------&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_CTS_B&amp;nbsp; 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_RTS_B&amp;nbsp; 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT4)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;root@wandboard-solo:~# ./memtool 20e0908 2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Reading 0x2 count starting at address 0x020E0908&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;0x020E0908:&amp;nbsp; 00000002 00000001&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Case #2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;-----------------------------------------------------------&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1&amp;nbsp;&amp;nbsp;&amp;nbsp; // new (ALT2)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_RTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_CTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;root@wandboard-solo:~# ./memtool 20e0908 2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Reading 0x2 count starting at address 0x020E0908&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;0x020E0908:&amp;nbsp; 00000000 00000001&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Case #3&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;-----------------------------------------------------------&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D23__UART3_RTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;MX6QDL_PAD_EIM_D31__UART3_CTS_B&amp;nbsp; 0x1b0b1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;root@wandboard-solo:~# ./memtool 20e0908 2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;Reading 0x2 count starting at address 0x020E0908&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="font-family: andale mono,times;"&gt;0x020E0908:&amp;nbsp; 00000000 00000000&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Datasheet chapters:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;37.4.572&lt;/STRONG&gt; Select Input Register (IOMUXC_UART3_UART_RTS_B_SELECT_INPUT)&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;37.4.573&lt;/STRONG&gt; Select Input Register (IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I change the IOMUXC_UART3_UART_RTS_B_SELECT_INPUT and/or IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT registers settings there is no changes in the UART behavoiur, so in DCE mode I always get TX data from MX6QDL_PAD_EIM_D24 where a change IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT shoud result in a different MX6QDL_PAD output for the TX (or RX) signal, but this is not true.&lt;/P&gt;&lt;P&gt;The conclusion seems that these registers setting are completely ignored by the CPU.&lt;/P&gt;&lt;P&gt;Could you please explain what is happening or what is wrong?&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 06 May 2016 13:19:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499706#M80699</guid>
      <dc:creator>marcocavallini</dc:creator>
      <dc:date>2016-05-06T13:19:13Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499707#M80700</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; The daisy chain feature is intended for multiplexing of input signals.&lt;/P&gt;&lt;P&gt;The following note is provided in IOMUXC_UART3_UART_RTS_B_SELECT_INPUT register description :&lt;/P&gt;&lt;P&gt;“Route RTS_B signal to pad when UART is in DCE mode. Route CTS_B signal to pad when UART is in DTE &lt;/P&gt;&lt;P&gt;mode.” &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; This means, we should select the DAISY option only for input signal (it depends what mode is used : DTE or DCE). &lt;/P&gt;&lt;P&gt;Output signal is not involved in daisy chains.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 May 2016 08:59:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499707#M80700</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-05-11T08:59:12Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6 dte-mode doesn't transmit chars on UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499708#M80701</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;At last I understood the behaviour and solved the problem.&lt;/P&gt;&lt;P&gt;This post explains everything perfectly: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-97509"&gt;https://community.freescale.com/docs/DOC-97509&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Be careful: dte-mode swaps &lt;STRONG&gt;RTS/CTS&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG style="text-decoration: underline;"&gt;and TX/RX&lt;/STRONG&gt; pins&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 16 May 2016 13:58:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-dte-mode-doesn-t-transmit-chars-on-UART/m-p/499708#M80701</guid>
      <dc:creator>marcocavallini</dc:creator>
      <dc:date>2016-05-16T13:58:18Z</dc:date>
    </item>
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