<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic i.MX6UL Linux ECSPI2_MISO on UART5_RX pin misconfiguration in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6UL-Linux-ECSPI2-MISO-on-UART5-RX-pin-misconfiguration/m-p/496215#M79875</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;BR /&gt;The input select configuration for the ECSPI2_MISO functionality being assigned to the UART5_RX_DATA pin is incorrectly configured for the i.MX6UL in the imx_3.14.52_1.1.0_ga and imx_3.14.38_6ul_ga kernels.&amp;nbsp; Specifically the Daisy Chain input register address and value is not present. Attached is a patch to the issue which was verified working on a custom i.MX6UL board.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336038"&gt;imx6ul_3.14.52_1.1.0_ga_ecspi2_miso_to_uart5_rx_input_select_fix.patch.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 29 Feb 2016 16:43:39 GMT</pubDate>
    <dc:creator>compmas2</dc:creator>
    <dc:date>2016-02-29T16:43:39Z</dc:date>
    <item>
      <title>i.MX6UL Linux ECSPI2_MISO on UART5_RX pin misconfiguration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6UL-Linux-ECSPI2-MISO-on-UART5-RX-pin-misconfiguration/m-p/496215#M79875</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;BR /&gt;The input select configuration for the ECSPI2_MISO functionality being assigned to the UART5_RX_DATA pin is incorrectly configured for the i.MX6UL in the imx_3.14.52_1.1.0_ga and imx_3.14.38_6ul_ga kernels.&amp;nbsp; Specifically the Daisy Chain input register address and value is not present. Attached is a patch to the issue which was verified working on a custom i.MX6UL board.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336038"&gt;imx6ul_3.14.52_1.1.0_ga_ecspi2_miso_to_uart5_rx_input_select_fix.patch.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Feb 2016 16:43:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6UL-Linux-ECSPI2-MISO-on-UART5-RX-pin-misconfiguration/m-p/496215#M79875</guid>
      <dc:creator>compmas2</dc:creator>
      <dc:date>2016-02-29T16:43:39Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6UL Linux ECSPI2_MISO on UART5_RX pin misconfiguration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6UL-Linux-ECSPI2-MISO-on-UART5-RX-pin-misconfiguration/m-p/496216#M79876</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; I forwarded this the the team.&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 01 Mar 2016 05:58:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6UL-Linux-ECSPI2-MISO-on-UART5-RX-pin-misconfiguration/m-p/496216#M79876</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-03-01T05:58:57Z</dc:date>
    </item>
  </channel>
</rss>

