<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックiMX6 Dual PCIe Question</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-Dual-PCIe-Question/m-p/494051#M79378</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am going to use the PCIe function on the iMX6 Dual Processor. I plan on using the iMX6 signal CLK1_N (ball C7) for the PCIe signal REFCLK- and the iMX6 signal CLK1_P (ball D7) for the PCIe signal REFCLK+. Does this differential clock signal have to be AC coupled? They are AC coupled on the Sabre PCBA but i"m not sure if that is correct.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 15 Jan 2016 16:23:51 GMT</pubDate>
    <dc:creator>davidboudreau</dc:creator>
    <dc:date>2016-01-15T16:23:51Z</dc:date>
    <item>
      <title>iMX6 Dual PCIe Question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-Dual-PCIe-Question/m-p/494051#M79378</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am going to use the PCIe function on the iMX6 Dual Processor. I plan on using the iMX6 signal CLK1_N (ball C7) for the PCIe signal REFCLK- and the iMX6 signal CLK1_P (ball D7) for the PCIe signal REFCLK+. Does this differential clock signal have to be AC coupled? They are AC coupled on the Sabre PCBA but i"m not sure if that is correct.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 Jan 2016 16:23:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6-Dual-PCIe-Question/m-p/494051#M79378</guid>
      <dc:creator>davidboudreau</dc:creator>
      <dc:date>2016-01-15T16:23:51Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6 Dual PCIe Question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-Dual-PCIe-Question/m-p/494052#M79379</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi David&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;it may be coupled directly provided that datasheet&lt;/P&gt;&lt;P&gt;LVDS I/O DC Parameters will be satisfied.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 16 Jan 2016 03:26:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6-Dual-PCIe-Question/m-p/494052#M79379</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-01-16T03:26:34Z</dc:date>
    </item>
  </channel>
</rss>

