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    <title>topic Re: pfuze100 IRQ handler missing? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/pfuze100-IRQ-handler-missing/m-p/492717#M79175</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For the following answer, I’m assuming that you are referring to the INTB pin of the PMIC, please correct me if I’m wrong.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;INTB is an open drain, active low output. It is asserted when any fault occurs, provided the fault interrupt is unmasked. INTB is de-asserted after the fault interrupt is cleared by software, which requires writing a “1” to the fault interrupt bit.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can find the interrupt handling and interrupt bit summary in section 6.5.3 and section 6.5.4 of the MMPF0100 datasheet: &lt;A href="http://cache.nxp.com/files/analog/doc/data_sheet/MMPF0100.pdf"&gt;http://cache.nxp.com/files/analog/doc/data_sheet/MMPF0100.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Jose Reyes&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 23 May 2016 17:46:56 GMT</pubDate>
    <dc:creator>reyes</dc:creator>
    <dc:date>2016-05-23T17:46:56Z</dc:date>
    <item>
      <title>pfuze100 IRQ handler missing?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/pfuze100-IRQ-handler-missing/m-p/492716#M79174</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I was going through "&lt;STRONG&gt;&lt;EM&gt;drivers/regulator/pfuze100-regulator.c&lt;/EM&gt;&lt;/STRONG&gt;" and I noticed that driver doesn't have IRQ handler.&lt;/P&gt;&lt;P&gt;But interrupt line of PMIC PFUZE100 is connected to IMX6 on SABRE board.&lt;/P&gt;&lt;P&gt;Is IRQ handler is missing in driver or It is not required? &lt;/P&gt;&lt;P&gt;If it is not required then why interrupt line of PMIC is connected to IMX6 in SABRE?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 May 2016 11:45:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/pfuze100-IRQ-handler-missing/m-p/492716#M79174</guid>
      <dc:creator>jaiminthakkar</dc:creator>
      <dc:date>2016-05-23T11:45:18Z</dc:date>
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    <item>
      <title>Re: pfuze100 IRQ handler missing?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/pfuze100-IRQ-handler-missing/m-p/492717#M79175</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For the following answer, I’m assuming that you are referring to the INTB pin of the PMIC, please correct me if I’m wrong.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;INTB is an open drain, active low output. It is asserted when any fault occurs, provided the fault interrupt is unmasked. INTB is de-asserted after the fault interrupt is cleared by software, which requires writing a “1” to the fault interrupt bit.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can find the interrupt handling and interrupt bit summary in section 6.5.3 and section 6.5.4 of the MMPF0100 datasheet: &lt;A href="http://cache.nxp.com/files/analog/doc/data_sheet/MMPF0100.pdf"&gt;http://cache.nxp.com/files/analog/doc/data_sheet/MMPF0100.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Jose Reyes&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 May 2016 17:46:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/pfuze100-IRQ-handler-missing/m-p/492717#M79175</guid>
      <dc:creator>reyes</dc:creator>
      <dc:date>2016-05-23T17:46:56Z</dc:date>
    </item>
    <item>
      <title>Re: pfuze100 IRQ handler missing?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/pfuze100-IRQ-handler-missing/m-p/492718#M79176</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Have the interrupts been implemented in a newer version of the driver or is that still up to us at this point?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 15 May 2017 13:59:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/pfuze100-IRQ-handler-missing/m-p/492718#M79176</guid>
      <dc:creator>mukelarvin</dc:creator>
      <dc:date>2017-05-15T13:59:41Z</dc:date>
    </item>
    <item>
      <title>Re: pfuze100 IRQ handler missing?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/pfuze100-IRQ-handler-missing/m-p/492719#M79177</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Luke,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I’m afraid not, the interrupts have not been implemented in the PFUZE driver.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Jose&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 15 May 2017 21:23:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/pfuze100-IRQ-handler-missing/m-p/492719#M79177</guid>
      <dc:creator>reyes</dc:creator>
      <dc:date>2017-05-15T21:23:11Z</dc:date>
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