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    <title>topic iMX6D/Q uSDHC read/write methods in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX6D-Q-uSDHC-read-write-methods/m-p/486779#M77907</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In iMx6Q uSDHC module, there are three options to read from / write to SD Card:&lt;/P&gt;&lt;P&gt;1-&amp;gt; Internal DMA, Over AHB Bus&lt;/P&gt;&lt;P&gt;2-&amp;gt; External DMA, Over IP Bus&lt;/P&gt;&lt;P&gt;3-&amp;gt; PIO, reading a register&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What are the advantages/disadvantages or considerations about these methods? In my opinion:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;a-) Reading a file via PIO is the slowest one and also makes CPU busy. This is not an efficient way. Then in which circumstances should we think to use this way?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;b-) Internal DMA is special to uSDHC. It provides us not to occupy external DMA, so it seems an efficient way to use resources of the chip. However I am not sure about comparison of internal/external DMA speeds.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What are your experiences/thoughts?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Cagatay&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 07 Apr 2016 06:14:06 GMT</pubDate>
    <dc:creator>cagatayozdemir</dc:creator>
    <dc:date>2016-04-07T06:14:06Z</dc:date>
    <item>
      <title>iMX6D/Q uSDHC read/write methods</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6D-Q-uSDHC-read-write-methods/m-p/486779#M77907</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In iMx6Q uSDHC module, there are three options to read from / write to SD Card:&lt;/P&gt;&lt;P&gt;1-&amp;gt; Internal DMA, Over AHB Bus&lt;/P&gt;&lt;P&gt;2-&amp;gt; External DMA, Over IP Bus&lt;/P&gt;&lt;P&gt;3-&amp;gt; PIO, reading a register&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What are the advantages/disadvantages or considerations about these methods? In my opinion:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;a-) Reading a file via PIO is the slowest one and also makes CPU busy. This is not an efficient way. Then in which circumstances should we think to use this way?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;b-) Internal DMA is special to uSDHC. It provides us not to occupy external DMA, so it seems an efficient way to use resources of the chip. However I am not sure about comparison of internal/external DMA speeds.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What are your experiences/thoughts?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Cagatay&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 06:14:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6D-Q-uSDHC-read-write-methods/m-p/486779#M77907</guid>
      <dc:creator>cagatayozdemir</dc:creator>
      <dc:date>2016-04-07T06:14:06Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6D/Q uSDHC read/write methods</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6D-Q-uSDHC-read-write-methods/m-p/486780#M77908</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class="tm7"&gt;&lt;SPAN class="tm8"&gt;&amp;nbsp; Please look at my comments below.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm9"&gt;&lt;SPAN class="tm8"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm9"&gt;&lt;SPAN class="tm8"&gt;1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm9"&gt;&lt;SPAN class="tm8"&gt;&amp;nbsp; You mentioned : “reading a file via PIO is the slowest one” - this is not obvious,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm9"&gt;&lt;SPAN class="tm8"&gt;since CPU frequency of 1 GHz allows to achieve very high performance for data&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm9"&gt;&lt;SPAN class="tm8"&gt;read in polling technique. But - You are right - this “also makes CPU busy” and &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm9"&gt;&lt;SPAN class="tm8"&gt;do not allow to use advantages of multi-tasking. Therefore polling approach is not &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm9"&gt;&lt;SPAN class="tm8"&gt;suitable for Linux.&lt;BR /&gt;&lt;BR /&gt;2. &lt;BR /&gt;&amp;nbsp; External DMA is used with the SDMA. The SDMA controller helps to optimize system &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm9"&gt;&lt;SPAN class="tm8"&gt;performance by offloading the CPU in dynamic data routing with relatively slow channels, &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm9"&gt;&lt;SPAN class="tm8"&gt;such as UART, SSI, SPI. &lt;/SPAN&gt;&lt;SPAN class="tm8"&gt;The SDMA is not the best solution to achieve maximal throughput. &lt;BR /&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; It makes sense to use the internal &lt;/SPAN&gt;&lt;SPAN class="tm8"&gt;DMA for maximal performance.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm11"&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 09:15:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6D-Q-uSDHC-read-write-methods/m-p/486780#M77908</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-04-07T09:15:35Z</dc:date>
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    <item>
      <title>Re: iMX6D/Q uSDHC read/write methods</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6D-Q-uSDHC-read-write-methods/m-p/486781#M77909</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks you Yuri. I think I need some more help to be totally clarified..&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What determines DMA speed? Can we estimate a number or it depends on the conditions at that moment? To compare with PIO speed, is it the only way to take benchmarks?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As far as I understand from your comment, SDMA optimizes system performance therefore it allocates resources for slowest channels too and that may decrease the throughput for SD read. Is this related to the fact that external DMA&amp;nbsp; uses IP bus but internal DMA uses AHB bus?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Cagatay&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 15:45:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6D-Q-uSDHC-read-write-methods/m-p/486781#M77909</guid>
      <dc:creator>cagatayozdemir</dc:creator>
      <dc:date>2016-04-07T15:45:38Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6D/Q uSDHC read/write methods</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6D-Q-uSDHC-read-write-methods/m-p/486782#M77910</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; DMA perofrmance depends on many factors, such as DMA module internal frequency, bus frequency, &lt;BR /&gt;internal arbitartion between SOC modules (for heavy loaded systems). We do not have special tool&lt;/P&gt;&lt;P&gt;to estimate it, because of system compexity.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: Verdana, sans-serif;"&gt;As for performance and implementation of SDMA approach, please look at the following :&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: Verdana, sans-serif;"&gt;“Measure SDMA Memory To Memory Copy Performance on i.MX6Q”&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&lt;SPAN style="font-weight: inherit; font-style: inherit; font-family: Verdana, sans-serif;"&gt;&lt;A _jive_internal="true" data-containerid="2004" data-containertype="14" data-content-finding="Community" data-objectid="103127" data-objecttype="102" href="https://community.nxp.com/docs/DOC-103127" style="font-weight: inherit; font-style: inherit; font-family: inherit; color: #017bba;"&gt;https://community.freescale.com/docs/DOC-103127&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Apr 2016 06:59:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6D-Q-uSDHC-read-write-methods/m-p/486782#M77910</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-04-08T06:59:47Z</dc:date>
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