<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX Processors中的主题 Re: i.MX6Q DDR TESTER TOOL MEM32bit WRITE/READ</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-DDR-TESTER-TOOL-MEM32bit-WRITE-READ/m-p/485842#M77664</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mehmet&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;memory map is described in Table 2-1. System memory map&lt;/P&gt;&lt;P&gt;i.MX6DQ Reference Manual, ddr starts with 0x1000_0000.&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.freescale.com/external-link.jspa?url=http%3A%2F%2Fcache.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fref_manual%2FIMX6DQRM.pdf" rel="nofollow" target="_blank"&gt;http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;May be useful presentation FTF-SDS-F0170&amp;nbsp; "DRAM Controller Optimization for i.MX"&lt;/P&gt;&lt;P&gt;describing mmdc programming:&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-thread-small" data-containerid="2004" data-containertype="14" data-objectid="384990" data-objecttype="1" href="https://community.freescale.com/thread/384990"&gt;https://community.freescale.com/thread/384990&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 17 Mar 2016 11:52:49 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2016-03-17T11:52:49Z</dc:date>
    <item>
      <title>i.MX6Q DDR TESTER TOOL MEM32bit WRITE/READ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-DDR-TESTER-TOOL-MEM32bit-WRITE-READ/m-p/485841#M77663</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am trying to bring up custom board based on i.MX6Q and total of 1GByte DDR3L. I have used the tool to obtain calibration results for 400MHz then applied the calibration results then run stress test for frequencies between 400 - 528 MHz. Test has been completed successfully. I also tried 32bit Memory Read write test, however for the Address value of A0000000, the tool warned me about system damage if the address is inappropriate and after clicking cross/ok. I guess read operation was unsucessfull. No data was present at the indicated address and the OTG connection was lost.I had to repower the board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;I want to ask if the address i used is ok for read/write operation? What is the address range in the memory map corresponding to 1GByte Ram? &lt;/LI&gt;&lt;LI&gt;Is it ok to run DDR3 with 400MHz for i.MX6Q.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;By the way I am using v2.40 of ddr tester tool. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="MEM_RW.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/23278i97FD99853D409B07/image-size/large?v=v2&amp;amp;px=999" role="button" title="MEM_RW.png" alt="MEM_RW.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance.. &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Mar 2016 11:34:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-DDR-TESTER-TOOL-MEM32bit-WRITE-READ/m-p/485841#M77663</guid>
      <dc:creator>mehmetertugafsi</dc:creator>
      <dc:date>2016-03-17T11:34:50Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6Q DDR TESTER TOOL MEM32bit WRITE/READ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-DDR-TESTER-TOOL-MEM32bit-WRITE-READ/m-p/485842#M77664</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mehmet&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;memory map is described in Table 2-1. System memory map&lt;/P&gt;&lt;P&gt;i.MX6DQ Reference Manual, ddr starts with 0x1000_0000.&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.freescale.com/external-link.jspa?url=http%3A%2F%2Fcache.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fref_manual%2FIMX6DQRM.pdf" rel="nofollow" target="_blank"&gt;http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;May be useful presentation FTF-SDS-F0170&amp;nbsp; "DRAM Controller Optimization for i.MX"&lt;/P&gt;&lt;P&gt;describing mmdc programming:&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-thread-small" data-containerid="2004" data-containertype="14" data-objectid="384990" data-objecttype="1" href="https://community.freescale.com/thread/384990"&gt;https://community.freescale.com/thread/384990&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Mar 2016 11:52:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-DDR-TESTER-TOOL-MEM32bit-WRITE-READ/m-p/485842#M77664</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-03-17T11:52:49Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6Q DDR TESTER TOOL MEM32bit WRITE/READ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-DDR-TESTER-TOOL-MEM32bit-WRITE-READ/m-p/485843#M77665</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for enlightening information. I have run the stress test for 400MHz with over night option for 15 hours (about 720 iterations) and it succeeded. For the address range from 1000_0000 to 5000_0000, i tried memory read/write option of the tool, for some specific addresses like 2FFF_FFFF, the program freezes. Furthermore, i dont lose otg connection as in the case mentioned above. What might be the cause of this issue?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Aside of this, is there any method to adjust drive strength, ODT on both CPU and RAM side for optimal performance?&lt;/P&gt;&lt;P&gt;DDR Stress tester already passes with the values given as a parameter in the excel aid no addition drive strength settings arent made on the CPU side.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="Capture.PNG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/23428i5470516C0481D644/image-size/large?v=v2&amp;amp;px=999" role="button" title="Capture.PNG" alt="Capture.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 18 Mar 2016 14:21:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-DDR-TESTER-TOOL-MEM32bit-WRITE-READ/m-p/485843#M77665</guid>
      <dc:creator>mehmetertugafsi</dc:creator>
      <dc:date>2016-03-18T14:21:40Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6Q DDR TESTER TOOL MEM32bit WRITE/READ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-DDR-TESTER-TOOL-MEM32bit-WRITE-READ/m-p/485844#M77666</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mehmet&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;unfortunately I have not sources of tool so can not comment on&lt;/P&gt;&lt;P&gt;"32bit Memory Read write test". However there are other good methods&lt;/P&gt;&lt;P&gt;for single read/write, for example with jtag or running uboot.&lt;/P&gt;&lt;P&gt;Regarding drive strength settings, these can be added manually to script.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 19 Mar 2016 00:41:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-DDR-TESTER-TOOL-MEM32bit-WRITE-READ/m-p/485844#M77666</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-03-19T00:41:52Z</dc:date>
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  </channel>
</rss>

