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    <title>topic Re: iMX6 DDR Stress test fail in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-DDR-Stress-test-fail/m-p/485670#M77615</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear igorpadykov,&lt;/P&gt;&lt;P&gt;I tried to reduce drive strength to 34_OHM (minimum value) in DCD (mx6q_4x_mt41j128.cfg) as i.MX 6Dual/6Quad Applications Processor Reference Manual Document : &lt;/P&gt;&lt;P&gt;DATA 4, 0x020e079c, 0x00000038&lt;/P&gt;&lt;P&gt;but the result still be same. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DDR Freq: 500 MHz&lt;/P&gt;&lt;P&gt;t0.1: data is addr test&lt;/P&gt;&lt;P&gt;Address of failure: 0x10000000&lt;/P&gt;&lt;P&gt;Data was: 0x50000000&lt;/P&gt;&lt;P&gt;But pattern&amp;nbsp; should match address &lt;/P&gt;&lt;P&gt;Error: failed to run stress test!!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks and Best Regards,&lt;/P&gt;&lt;P&gt;Vu Nguyen&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 25 Feb 2016 09:01:44 GMT</pubDate>
    <dc:creator>vunguyencong</dc:creator>
    <dc:date>2016-02-25T09:01:44Z</dc:date>
    <item>
      <title>iMX6 DDR Stress test fail</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-DDR-Stress-test-fail/m-p/485668#M77613</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear guys,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We had designed a custom board based on iMX6 Sabresd reference design. We have using 4 parts DDR&amp;nbsp; MT41K256M16-125 (4x512MB). We used I.MX6DQSDL DDR3 Script Aid V0.10 to create a new DCD and then run ddr_stress_tester_uboot_v2.30 to apply new calibration parameters. Everything worked well.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After that, we also design another custom board, DDR configuration, schematic, layout were same as the previous custom board. However, we change DDR part to MT41K256M16-107 because DDR&amp;nbsp; MT41K256M16-125 out of stock. When we're using previous U-boot (for previous custom board), the stress test fail as :&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DDR Stress Test (2.3.0) &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Build: Nov 20 2015, 16:06:31&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Freescale Semiconductor, Inc.&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip ID&lt;/P&gt;&lt;P&gt;CHIP ID = i.MX6 Dual/Quad (0x63)&lt;/P&gt;&lt;P&gt;Internal Revision = TO1.5&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Boot Configuration&lt;/P&gt;&lt;P&gt;SRC_SBMR1(0x020d8004) = 0x00005040&lt;/P&gt;&lt;P&gt;SRC_SBMR2(0x020d801c) = 0x32000001&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What ARM core speed would you like to run? &lt;/P&gt;&lt;P&gt;Type 1 for 800MHz, 2 for 1GHz, 3 for 1.2GHz&amp;nbsp; &lt;/P&gt;&lt;P&gt;ARM Clock set to 800MHz&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DDR configuration&lt;/P&gt;&lt;P&gt;BOOT_CFG3[5-4]: 0x00, Single DDR channel.&lt;/P&gt;&lt;P&gt;DDR type is DDR3 &lt;/P&gt;&lt;P&gt;Data width: 64, bank num: 8&lt;/P&gt;&lt;P&gt;Row size: 15, col size: 10&lt;/P&gt;&lt;P&gt;Chip select CSD0 is used &lt;/P&gt;&lt;P&gt;Density per chip select: 2048MB &lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Current Tempareture: 40&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please select the DDR density per chip select (in bytes) on the board &lt;/P&gt;&lt;P&gt;Type 0 for 2GB; 1 for 1GB; 2 for 512MB; 3 for 256MB; 4 for 128MB; 5 for 64MB; 6 for 32MB&amp;nbsp; &lt;/P&gt;&lt;P&gt;For maximum supported density (4GB), we can only access up to 3.75GB.&amp;nbsp; Type 7 to select this &lt;/P&gt;&lt;P&gt;&amp;nbsp; DDR density selected (MB): 2048&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Would do you want run DDR Calibration? Type 'y' to run and 'n' to skip&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The DDR stress test can run with an incrementing frequency or at a static freq &lt;/P&gt;&lt;P&gt;To run at a static freq, simply set the start freq and end freq to the same value &lt;/P&gt;&lt;P&gt;Would do you want run DDR Stress Test? Type 'y' to run and 'n' to skip&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Enter desired START freq (135 to 672 MHz), then hit enter. &lt;/P&gt;&lt;P&gt; Note: DDR3 minimum is ~333MHz, do not recommend to go too much below this. &lt;/P&gt;&lt;P&gt;600&lt;/P&gt;&lt;P&gt;&amp;nbsp; The freq you entered was: 600&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Enter desired END freq (135 to 672 MHz), then hit enter. &lt;/P&gt;&lt;P&gt;Make sure this is equal to or greater than start freq &lt;/P&gt;&lt;P&gt;650&lt;/P&gt;&lt;P&gt;&amp;nbsp; The freq you entered was: 650&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you want to run DDR Stress Test for simple loop or Over Night Test?&lt;/P&gt;&lt;P&gt;Type '0' for simple loop. Type '1' for Over Night Test&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DDR Stress Test Iteration 1&lt;/P&gt;&lt;P&gt;Current Tempareture: 40&lt;/P&gt;&lt;P&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DDR Freq: 599 MHz&lt;/P&gt;&lt;P&gt;t0.1: data is addr test&lt;/P&gt;&lt;P&gt;Address of failure: 0x10000000&lt;/P&gt;&lt;P&gt;Data was: 0x50000000&lt;/P&gt;&lt;P&gt;But pattern&amp;nbsp; should match address &lt;/P&gt;&lt;P&gt;Error: failed to run stress test!!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However when we select 1GB for stresstest as :&lt;/P&gt;&lt;P&gt;Type 0 for 2GB; 1 for 1GB; 2 for 512MB; 3 for 256MB; 4 for 128MB; 5 for 64MB; 6 for 32MB&amp;nbsp; &lt;/P&gt;&lt;P&gt;For maximum supported density (4GB), we can only access up to 3.75GB.&amp;nbsp; Type 7 to select this &lt;/P&gt;&lt;P&gt;&amp;nbsp; DDR density selected (MB): 1024&lt;/P&gt;&lt;P&gt;It work well. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We also tested common read/write on the address higher than 1GB (0x50000000 - 0x8FFFFFFF) with mtest tool in u-boot, it still work.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any advice ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks and Best Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Feb 2016 02:59:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6-DDR-Stress-test-fail/m-p/485668#M77613</guid>
      <dc:creator>vunguyencong</dc:creator>
      <dc:date>2016-02-25T02:59:03Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6 DDR Stress test fail</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-DDR-Stress-test-fail/m-p/485669#M77614</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi vu&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;message:&lt;/P&gt;&lt;P&gt;"Address of failure: 0x10000000&lt;/P&gt;&lt;P&gt;Data was: 0x50000000"&lt;/P&gt;&lt;P&gt;means that erroneous bit 30 ("0x40000000") appears,&lt;/P&gt;&lt;P&gt;this may be due to big drive strength settings. So one can try to tweak&lt;/P&gt;&lt;P&gt;drive strength pad of ddr line 31 (register IOMUXC_SW_PAD_CTL_GRP_B3DS) .&lt;/P&gt;&lt;P&gt;Also recommended to check this line by oscilloscope. Also drive strength can be&lt;/P&gt;&lt;P&gt;changed on ddr side.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Feb 2016 08:04:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6-DDR-Stress-test-fail/m-p/485669#M77614</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-02-25T08:04:47Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6 DDR Stress test fail</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-DDR-Stress-test-fail/m-p/485670#M77615</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear igorpadykov,&lt;/P&gt;&lt;P&gt;I tried to reduce drive strength to 34_OHM (minimum value) in DCD (mx6q_4x_mt41j128.cfg) as i.MX 6Dual/6Quad Applications Processor Reference Manual Document : &lt;/P&gt;&lt;P&gt;DATA 4, 0x020e079c, 0x00000038&lt;/P&gt;&lt;P&gt;but the result still be same. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DDR Freq: 500 MHz&lt;/P&gt;&lt;P&gt;t0.1: data is addr test&lt;/P&gt;&lt;P&gt;Address of failure: 0x10000000&lt;/P&gt;&lt;P&gt;Data was: 0x50000000&lt;/P&gt;&lt;P&gt;But pattern&amp;nbsp; should match address &lt;/P&gt;&lt;P&gt;Error: failed to run stress test!!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks and Best Regards,&lt;/P&gt;&lt;P&gt;Vu Nguyen&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Feb 2016 09:01:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6-DDR-Stress-test-fail/m-p/485670#M77615</guid>
      <dc:creator>vunguyencong</dc:creator>
      <dc:date>2016-02-25T09:01:44Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6 DDR Stress test fail</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6-DDR-Stress-test-fail/m-p/485671#M77616</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;More information:&lt;/P&gt;&lt;P&gt;I'm using this u-boot version : uboot-imx-imx_v2013.04_3.10.17_1.0.0_beta&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Feb 2016 09:13:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6-DDR-Stress-test-fail/m-p/485671#M77616</guid>
      <dc:creator>vunguyencong</dc:creator>
      <dc:date>2016-02-25T09:13:36Z</dc:date>
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