topic Re: PMIC and iMX6 interface issue in i.MX Processors

PMIC and iMX6 interface issue

christumas — Wed, 27 Apr 2016 18:25:09 GMT

We currently have an iMX6 design with the MMPF0100 PMIC. The power design looks very much like the MCIMX6SLEVK board. The PMIC LICELL is connected to a rechargable ML-2020 coin cell battery. The PWRON pin is connected to the iMX6 PMIC_ON_REQ. The iMX6 ONOFF pin is connected to a test point.

We have run into an issue where the iMX6 will somehow pull the PMIC_ON_REQ low and the PMIC will no longer power up the system when VIN is transitioned from low to high. Is there any registers in the iMX6 to keep the PMIC_ON_REQ from ever going low? Is there any registers in the MMPF0100 which would ignore the PMIC_ON_REQ?

I would also like to get a better description of the PWRCTL register bits in the PMIC (address 1B) . Would anyone have this information.

Thanks

Re: PMIC and iMX6 interface issue

igorpadykov — Thu, 28 Apr 2016 00:29:07 GMT

Hi Chris

it is not recommended to leave floating ONOFF, as i.MX may not get proper internal

pull up voltage in floating state. Software patch below allows sw control for PMIC_ON_REQ

Q&A: How is mx6 PMIC_ON_REQ under SW control?

Best regards

igor

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Re: PMIC and iMX6 interface issue

christumas — Thu, 28 Apr 2016 17:22:57 GMT

Igor,

Can you please explian how the iMX6 ONOFF pin would get into a floating

state? All of the eval schematics we have show a pull up resistor which

is DNP.

Is there any possibility the PMIC_PWR_ON could go low due to a dropping

LI Battery yet the VSNS voltage remain high enough to not reset the

circuit when the VSNS voltage is raised by VIN to the PMIC?

Best Regards

Chris