<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: About IMX6Q AIPSTZ OPACR in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479387#M76271</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi igorpadykov&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; the table 2-3 I only can&amp;nbsp; confirm is that the UART4 is belong to AIPS-2,and AIPS-2 occpuies a 1Mbyte portion of the address space, the register maps of the IPS peripherals are location on 16KByte, there are 32 OPACRx that can configuration the thirty-two 16-Kbyt external IPS peripherals. The table2-3 still not say which 16-Kbyte block address space&amp;nbsp; a OPACRx corresponding to. The datasheet written is unclear.Can you help me explain it ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; thank you!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 16 Mar 2016 01:53:02 GMT</pubDate>
    <dc:creator>jiongzhongliu</dc:creator>
    <dc:date>2016-03-16T01:53:02Z</dc:date>
    <item>
      <title>About IMX6Q AIPSTZ OPACR</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479385#M76269</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #000000; font-family: Arial; font-size: 14px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Now I use your company's product IMX6Q as my CPU, and I try to used the TrustZone function.&amp;nbsp; Now I want to set the UART4&amp;nbsp; as a untrust peripheral .The datasheet say I should configure the register CSU and AIPSTZ. USART4 is belong to AIPS-2, but I can not&amp;nbsp; find&amp;nbsp; which OPACR the UART4 belong to . Is there other datasheet introduce this imformation? Can you help me? &lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Mar 2016 13:24:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479385#M76269</guid>
      <dc:creator>jiongzhongliu</dc:creator>
      <dc:date>2016-03-15T13:24:38Z</dc:date>
    </item>
    <item>
      <title>Re: About IMX6Q AIPSTZ OPACR</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479386#M76270</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi jiongzhong&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Table 2-3&amp;nbsp; "AIPS-2 memory map" i.MX6DQ Reference Manual&lt;/P&gt;&lt;P&gt;lists peripherals, they correspond records in "AIPSTZ memory map"&lt;/P&gt;&lt;P&gt;on p.564 AIPSTZ2_OPACR,AIPSTZ2_OPACR1.. and so on&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.freescale.com/external-link.jspa?url=http%3A%2F%2Fcache.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fref_manual%2FIMX6DQRM.pdf" rel="nofollow" target="_blank"&gt;http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Mar 2016 00:50:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479386#M76270</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-03-16T00:50:40Z</dc:date>
    </item>
    <item>
      <title>Re: About IMX6Q AIPSTZ OPACR</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479387#M76271</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi igorpadykov&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; the table 2-3 I only can&amp;nbsp; confirm is that the UART4 is belong to AIPS-2,and AIPS-2 occpuies a 1Mbyte portion of the address space, the register maps of the IPS peripherals are location on 16KByte, there are 32 OPACRx that can configuration the thirty-two 16-Kbyt external IPS peripherals. The table2-3 still not say which 16-Kbyte block address space&amp;nbsp; a OPACRx corresponding to. The datasheet written is unclear.Can you help me explain it ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; thank you!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Mar 2016 01:53:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479387#M76271</guid>
      <dc:creator>jiongzhongliu</dc:creator>
      <dc:date>2016-03-16T01:53:02Z</dc:date>
    </item>
    <item>
      <title>Re: About IMX6Q AIPSTZ OPACR</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479388#M76272</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/23236i6126CF8BDE6CA7DF/image-size/large?v=v2&amp;amp;px=999" title="3.jpg" alt="3.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/23189iB780675DE78B6AC4/image-size/large?v=v2&amp;amp;px=999" title="2.jpg" alt="2.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Mar 2016 05:00:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479388#M76272</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-03-16T05:00:09Z</dc:date>
    </item>
    <item>
      <title>Re: About IMX6Q AIPSTZ OPACR</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479389#M76273</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;thanks!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Mar 2016 06:03:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-IMX6Q-AIPSTZ-OPACR/m-p/479389#M76273</guid>
      <dc:creator>jiongzhongliu</dc:creator>
      <dc:date>2016-03-16T06:03:28Z</dc:date>
    </item>
  </channel>
</rss>

