<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Question, i.MX25 32K clock input. in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX25-32K-clock-input/m-p/479195#M76213</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;Miyamoto,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Actually, the 32K clock should be stable before POR releases, because after POR , ROM code will use the clock to do booting configurations.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; But according to the customer's issue, if system is not stable, she can consider delaying the time of POR over 500ms !&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Hope the suggestion can help you !&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;Weidong&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 01 Feb 2016 06:48:41 GMT</pubDate>
    <dc:creator>weidong_sun</dc:creator>
    <dc:date>2016-02-01T06:48:41Z</dc:date>
    <item>
      <title>Question, i.MX25 32K clock input.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX25-32K-clock-input/m-p/479194#M76212</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My customer plans to use 32K crystal for i.MX25 OSC32K_EXTAL.&lt;/P&gt;&lt;P&gt;On their board, the 32K clock input from the crystal can be stable at 500mS later after the release of POR.&lt;/P&gt;&lt;P&gt;Is it OK?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Feb 2016 05:19:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX25-32K-clock-input/m-p/479194#M76212</guid>
      <dc:creator>Aemj</dc:creator>
      <dc:date>2016-02-01T05:19:39Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX25 32K clock input.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX25-32K-clock-input/m-p/479195#M76213</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;Miyamoto,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Actually, the 32K clock should be stable before POR releases, because after POR , ROM code will use the clock to do booting configurations.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; But according to the customer's issue, if system is not stable, she can consider delaying the time of POR over 500ms !&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Hope the suggestion can help you !&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; font-size: 14px;"&gt;Weidong&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Feb 2016 06:48:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX25-32K-clock-input/m-p/479195#M76213</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2016-02-01T06:48:41Z</dc:date>
    </item>
  </channel>
</rss>

