topic Re: LVDS interface problem on i.MX53 in i.MX Processors

LVDS interface problem on i.MX53

rostislav — Wed, 08 Aug 2012 16:43:17 GMT

I found weird behavior of the LVDS.

Only reasonable explanation is that LDB_CTRL bits 5 and 6 are exchanged.

Another possible typo in the document is description of bit_mapping_ch0:

0 Use SPWG standard.
1 Use JEIDA standard.

I found that VESA (I believe that the same as SPWG) LVDS display works properly if the bit_mapping_ch0 is set.

After modification of the bits definition the color on the 18 bpp LCD of Touch Revolution became proper.

rostislav — Wed, 08 Aug 2012 16:46:06 GMT

Document that probably has typos is:

i.MX53 Multimedia Applications
Processor Reference Manual
Document Number: iMX53RM
Rev. 2, 12/2011

The Kernel code definitions are the same as in the document.

VladanJovanovic — Thu, 09 Aug 2012 06:32:27 GMT

Hi,

If you believe there's an error in documentation, please enter a Service Request to Freescale via www.freescale.com/support

Regards,

Vladan

rostislav — Thu, 09 Aug 2012 12:06:05 GMT

Thanks, Vladan.

Done