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    <title>topic Re: DDR3 Custom Board Configuration in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473266#M74917</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Says&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can find in comments attached file:&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;// Mode register writes &lt;/TD&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x021b001c =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x04008032&amp;nbsp;&amp;nbsp;&amp;nbsp; // MMDC0_MDSCR, MR2 write, CS0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 03 Jun 2016 02:57:44 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2016-06-03T02:57:44Z</dc:date>
    <item>
      <title>DDR3 Custom Board Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473263#M74914</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello NXP Team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am trying to bring up a custom board which is using imx6 solo processor with different DDR3 SDRAM Configuration&lt;/P&gt;&lt;P&gt;I am trying to understand the following settings on SABRE solo board . Could you please explain&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x21b001c = 0x04008032&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x21b001c = 0x8033&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x21b001c = 0x48031:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Says&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Jun 2016 21:25:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473263#M74914</guid>
      <dc:creator>sayi</dc:creator>
      <dc:date>2016-06-02T21:25:41Z</dc:date>
    </item>
    <item>
      <title>Re: DDR3 Custom Board Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473264#M74915</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Says&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;these records performs programming DDR chips Mode registers,&lt;/P&gt;&lt;P&gt;description can be found in sect.45.12.8 MMDC Core Special Command&lt;/P&gt;&lt;P&gt;Register (MMDCx_MDSCR) i.MX6SDL Reference Manual &lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fcache.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fref_manual%2FIMX6SDLRM.pdf" rel="nofollow" target="_blank"&gt;http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6SDLRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;and datasheets of used DDR parts.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Jun 2016 01:12:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473264#M74915</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-06-03T01:12:18Z</dc:date>
    </item>
    <item>
      <title>Re: DDR3 Custom Board Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473265#M74916</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you Igor.&lt;/P&gt;&lt;P&gt;I already saw the reference manual but I am a bit confused with mode register setting.&lt;/P&gt;&lt;P&gt;For Ex: 0x21b001c = 0x04008032&lt;/P&gt;&lt;P&gt;The mode register address is 0x0400 and I couldn't figure this address from the DRAM manufacturer data sheet.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you please help?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Jun 2016 02:39:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473265#M74916</guid>
      <dc:creator>sayi</dc:creator>
      <dc:date>2016-06-03T02:39:22Z</dc:date>
    </item>
    <item>
      <title>Re: DDR3 Custom Board Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473266#M74917</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Says&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can find in comments attached file:&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;// Mode register writes &lt;/TD&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;setmem /32&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x021b001c =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x04008032&amp;nbsp;&amp;nbsp;&amp;nbsp; // MMDC0_MDSCR, MR2 write, CS0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Jun 2016 02:57:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473266#M74917</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-06-03T02:57:44Z</dc:date>
    </item>
    <item>
      <title>Re: DDR3 Custom Board Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473267#M74918</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks. This was helpful.&lt;/P&gt;&lt;P&gt;- Can we use JTAG to initialize memory? Are there any scripts for JTAG and recommendations from freescale to bring up a custom board based on solo.?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am looking at the uboot code&amp;nbsp; board configuration files and they are *.cfg files with Device configuration Tables is this the only place to change the needed for custom board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Appreciate your time!!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Jun 2016 14:20:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473267#M74918</guid>
      <dc:creator>sayi</dc:creator>
      <dc:date>2016-06-03T14:20:28Z</dc:date>
    </item>
    <item>
      <title>Re: DDR3 Custom Board Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473268#M74919</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;please look at&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.freescale.com/docs/DOC-105652" title="https://community.freescale.com/docs/DOC-105652"&gt;https://community.freescale.com/docs/DOC-105652&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Jun 2016 15:06:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473268#M74919</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-06-03T15:06:52Z</dc:date>
    </item>
    <item>
      <title>Re: DDR3 Custom Board Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473269#M74920</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks Igor !! One final question before I close this topic.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;- From BSP porting document for configuring DDR3 I see free-scale mentioned about changing the *.cfg file in boards/mx6solosabresd/*.cfg file but I also see Plugin.s file in the same folder that has the same DCD table as the cfg file and from make file I see we are using plugin.s object file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For board mx6solosabresd:&lt;/P&gt;&lt;P&gt;Could you please clarify if we should change the DCD table in *.cfg or plugin.s it looks like plugin.s is the assembly version of the *.cfg file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Swapna&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Jun 2016 20:05:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473269#M74920</guid>
      <dc:creator>sayi</dc:creator>
      <dc:date>2016-06-03T20:05:53Z</dc:date>
    </item>
    <item>
      <title>Re: DDR3 Custom Board Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473270#M74921</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Swapna&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;both options are equal, one can use them&lt;/P&gt;&lt;P&gt;on own choice.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 07 Jun 2016 01:50:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR3-Custom-Board-Configuration/m-p/473270#M74921</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-06-07T01:50:22Z</dc:date>
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