i.MX6SX module access by A9 and M4 core.

satoshishimoda — Thu, 28 Jan 2016 07:33:29 GMT

Hi community,

I have some question about i.MX6SX.

Please see the questions as below.

[Q1]

I believe all modules in i.MX6SX (MMDC, ENET, OCRAM, etc...) can be accessed from both Cortex-A9 and Cortex-M4 core?

Is this correct?

Of cource, I know several modules are not supported by FreeRTOS BSP for M4 core.

But in this post, please mention about hardware.

[Q2]

I think there is possibility that both A9 and M4 core access to same module at the same time.

In this case, conflict will be occurred? or conflict is avoidable by some module (SEMA4 and RDC?)?

Best Regards,

Satoshi Shimoda

Re: i.MX6SX module access by A9 and M4 core.

joanxie — Fri, 05 Feb 2016 04:53:14 GMT

for how to arrange between this two cpus, pls refer to the ppt file as below, which has more detailed information about it.