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    <title>i.MX ProcessorsのトピックCan i.MX6DQ ESAI network mode add padding bit?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Can-i-MX6DQ-ESAI-network-mode-add-padding-bit/m-p/468377#M73932</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a question about i.MX6DQ ESAI.&lt;/P&gt;&lt;P&gt;I understand SSI network mode cannot add padding data in &lt;A href="https://community.nxp.com/thread/338887"&gt;i.mx6 SSI in TDM mode&lt;/A&gt; .&lt;/P&gt;&lt;P&gt;Then, how about ESAI network mode?&lt;/P&gt;&lt;P&gt;ESAI network mode cannot add padding data as the following image also?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="Screenshot+from+2015-01-12+18-44-27.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/36644i4F36A05D912A894D/image-size/large?v=v2&amp;amp;px=999" role="button" title="Screenshot+from+2015-01-12+18-44-27.png" alt="Screenshot+from+2015-01-12+18-44-27.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 06 Jan 2016 02:51:09 GMT</pubDate>
    <dc:creator>satoshishimoda</dc:creator>
    <dc:date>2016-01-06T02:51:09Z</dc:date>
    <item>
      <title>Can i.MX6DQ ESAI network mode add padding bit?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Can-i-MX6DQ-ESAI-network-mode-add-padding-bit/m-p/468377#M73932</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a question about i.MX6DQ ESAI.&lt;/P&gt;&lt;P&gt;I understand SSI network mode cannot add padding data in &lt;A href="https://community.nxp.com/thread/338887"&gt;i.mx6 SSI in TDM mode&lt;/A&gt; .&lt;/P&gt;&lt;P&gt;Then, how about ESAI network mode?&lt;/P&gt;&lt;P&gt;ESAI network mode cannot add padding data as the following image also?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="Screenshot+from+2015-01-12+18-44-27.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/36644i4F36A05D912A894D/image-size/large?v=v2&amp;amp;px=999" role="button" title="Screenshot+from+2015-01-12+18-44-27.png" alt="Screenshot+from+2015-01-12+18-44-27.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Jan 2016 02:51:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Can-i-MX6DQ-ESAI-network-mode-add-padding-bit/m-p/468377#M73932</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2016-01-06T02:51:09Z</dc:date>
    </item>
    <item>
      <title>Re: Can i.MX6DQ ESAI network mode add padding bit?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Can-i-MX6DQ-ESAI-network-mode-add-padding-bit/m-p/468378#M73933</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Satoshi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ESAI is able to add padding data, as shown in above diagrams.&lt;/P&gt;&lt;P&gt;In ESAI network mode it can output/receive 32 bits per slot, set by&lt;/P&gt;&lt;P&gt;SLOT LENGTH=32, described in Table 25-6. ESAI Transmit Slot&lt;/P&gt;&lt;P&gt;Table 25-9. ESAI Receive Slot i.MX6DQ Reference Manual&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf" rel="nofollow"&gt;http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Jan 2016 06:08:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Can-i-MX6DQ-ESAI-network-mode-add-padding-bit/m-p/468378#M73933</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-01-06T06:08:51Z</dc:date>
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