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    <title>topic Re: i.MX7 NAND boot issue in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX7-NAND-boot-issue/m-p/467354#M73746</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Actually, the values of this struct just repeat the values of BT_CFG[19:0] signals for some reason. For regular boot, two upper bytes are always all 0s, for NAND Flash boot the second byte is 0x3y, where y depends on the NAND Flash type according to the table below, the first byte can be left also all 0s or refer to the table below.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/59765iC25FE606FCBB3E20/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Artur&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 09:10:56 GMT</pubDate>
    <dc:creator>art</dc:creator>
    <dc:date>2016-06-15T09:10:56Z</dc:date>
    <item>
      <title>i.MX7 NAND boot issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX7-NAND-boot-issue/m-p/467352#M73744</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am having an issue booting an i.MX7 from NAND FLASH.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The MFG tool is being used to program the NAND. The external GPIO boot config is set to NAND. The U-Boot is not booting from the NAND.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The U-Boot code set for the NXP MCIMX7SABRE EVM board does not have NAND fully supported.&lt;/P&gt;&lt;P&gt;The example code mx7dsabresd.c has a block of code with a TODO: NAND in it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static const struct boot_mode board_boot_modes[] = {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* 4 bit bus width */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {"emmc", MAKE_CFGVAL(0x10, 0x2a, 0x00, 0x00)},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* TODO: Nand */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {"qspi", MAKE_CFGVAL(0x00, 0x40, 0x00, 0x00)},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {NULL,&amp;nbsp;&amp;nbsp; 0},&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does anyone know the values for MAKE_CFGVAL entires for NAND?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Or how these values are determined?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;Phil&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 31 May 2016 14:53:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX7-NAND-boot-issue/m-p/467352#M73744</guid>
      <dc:creator>phillipsteinhof</dc:creator>
      <dc:date>2016-05-31T14:53:01Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX7 NAND boot issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX7-NAND-boot-issue/m-p/467353#M73745</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I was able to find some additional information with the help from a friend. The following is my understanding of the interface extension.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It seems that this is a new feature and the documentation for it is still being developed.&lt;/P&gt;&lt;P&gt;This feature provides an interface to allow additional boot media that is not part of the normal fuse or GPIO.&lt;/P&gt;&lt;P&gt;The SRC_GPR10[28] and SRC_GPR9 are part of the feature setup.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The NAND is already part of the normal interface provided by the fuse or GPIO. The BOOT_CFG passed to the hardware during boot were used to define the MAKE_CFGVAL for this extended interface. The NAND boot cfg2 is 0x30, the other values were zero to allow this interface to also use the NAND.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Jun 2016 15:48:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX7-NAND-boot-issue/m-p/467353#M73745</guid>
      <dc:creator>phillipsteinhof</dc:creator>
      <dc:date>2016-06-03T15:48:38Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX7 NAND boot issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX7-NAND-boot-issue/m-p/467354#M73746</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Actually, the values of this struct just repeat the values of BT_CFG[19:0] signals for some reason. For regular boot, two upper bytes are always all 0s, for NAND Flash boot the second byte is 0x3y, where y depends on the NAND Flash type according to the table below, the first byte can be left also all 0s or refer to the table below.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/59765iC25FE606FCBB3E20/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Artur&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 09:10:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX7-NAND-boot-issue/m-p/467354#M73746</guid>
      <dc:creator>art</dc:creator>
      <dc:date>2016-06-15T09:10:56Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX7 NAND boot issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX7-NAND-boot-issue/m-p/467355#M73747</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Phil,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;do you solve this issue? I have the same issue as yours. I change the boot config to the setting of boot from nand following to the boot table, and mount an empty nand device on board, but when I plugin SD card, my board still boot up from sd card.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Mar 2017 20:04:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX7-NAND-boot-issue/m-p/467355#M73747</guid>
      <dc:creator>kevinmu</dc:creator>
      <dc:date>2017-03-20T20:04:53Z</dc:date>
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