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    <title>topic IMX6 32kHz Design Considerations in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX6-32kHz-Design-Considerations/m-p/466132#M73434</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are developing an IMX6 Solo/Quad common design and have seen a reference that states that applying a 32.768kHz external clock to RTC_XTAL1 can reduce boot time.&amp;nbsp; I cannot find an ap-note that describes this or addresses possible concerns.&amp;nbsp; Reading this forum and t6eh datasheetss, we see that the main considerations are that VDD_SNVS is powered, POR_B remains asserted until the clock is stable, XTAL0 left floating with a clock in to RTC_XTAL1, and that the peak amplitude of the clock must not exceed VDD_SNVS.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We would like to ask a few questions.&lt;/P&gt;&lt;P&gt;1 - does the use of an external 32kHz clock improve boot time?&lt;/P&gt;&lt;P&gt;2 - are the assumptions above correct?&lt;/P&gt;&lt;P&gt;3 - does the input to RTC_XTAL1 need to be AC coupled and is a series resistor required?&lt;/P&gt;&lt;P&gt;4 - are there other aspects to implementing an external 32k clock that NXP recommends or an AP note or reference design I should have referenced?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your consideration,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BW&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 26 Jan 2016 16:29:43 GMT</pubDate>
    <dc:creator>bomsweigh</dc:creator>
    <dc:date>2016-01-26T16:29:43Z</dc:date>
    <item>
      <title>IMX6 32kHz Design Considerations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6-32kHz-Design-Considerations/m-p/466132#M73434</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are developing an IMX6 Solo/Quad common design and have seen a reference that states that applying a 32.768kHz external clock to RTC_XTAL1 can reduce boot time.&amp;nbsp; I cannot find an ap-note that describes this or addresses possible concerns.&amp;nbsp; Reading this forum and t6eh datasheetss, we see that the main considerations are that VDD_SNVS is powered, POR_B remains asserted until the clock is stable, XTAL0 left floating with a clock in to RTC_XTAL1, and that the peak amplitude of the clock must not exceed VDD_SNVS.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We would like to ask a few questions.&lt;/P&gt;&lt;P&gt;1 - does the use of an external 32kHz clock improve boot time?&lt;/P&gt;&lt;P&gt;2 - are the assumptions above correct?&lt;/P&gt;&lt;P&gt;3 - does the input to RTC_XTAL1 need to be AC coupled and is a series resistor required?&lt;/P&gt;&lt;P&gt;4 - are there other aspects to implementing an external 32k clock that NXP recommends or an AP note or reference design I should have referenced?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your consideration,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BW&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Jan 2016 16:29:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6-32kHz-Design-Considerations/m-p/466132#M73434</guid>
      <dc:creator>bomsweigh</dc:creator>
      <dc:date>2016-01-26T16:29:43Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6 32kHz Design Considerations</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6-32kHz-Design-Considerations/m-p/466133#M73435</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi BOMS&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;since 32kHz crystal may have significant start-up times,&lt;/P&gt;&lt;P&gt;providing it externally can improve boot time.&lt;/P&gt;&lt;P&gt;No need for AC coupling, recommendations are provided in&lt;/P&gt;&lt;P&gt;Table 2-7. Oscillator and clock recommendations&lt;/P&gt;&lt;P&gt;i.MX6 System Development User’s Guide &lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf" rel="nofollow"&gt;http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Jan 2016 01:30:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6-32kHz-Design-Considerations/m-p/466133#M73435</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-01-27T01:30:33Z</dc:date>
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