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    <title>topic Re: EIM Internel Module Multiplexing in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/EIM-Internel-Module-Multiplexing/m-p/464413#M73062</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; It is not a problem (to leave floating high address lines) if these signals &lt;/P&gt;&lt;P&gt;are not used in Your device, connected to the EIM. Address range is defined&lt;/P&gt;&lt;P&gt;by CS. Please refer to Table 2-1 (System memory map) and section 22.4 (Chip &lt;BR /&gt;Select Memory Map)&amp;nbsp; of the Reference Manual.&amp;nbsp; CS must be used.&lt;/P&gt;&lt;P&gt;Note, address range will be restricted by low 16 bit.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 17 Feb 2016 06:19:03 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2016-02-17T06:19:03Z</dc:date>
    <item>
      <title>EIM Internel Module Multiplexing</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/EIM-Internel-Module-Multiplexing/m-p/464412#M73061</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I want to simply the&amp;nbsp; ADDRESS bus.&amp;nbsp; Please check the picture below.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="EIM_Interface.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/53765i591F9D43876A3696/image-size/large?v=v2&amp;amp;px=999" role="button" title="EIM_Interface.JPG" alt="EIM_Interface.JPG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Feb 2016 04:01:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/EIM-Internel-Module-Multiplexing/m-p/464412#M73061</guid>
      <dc:creator>wanglee</dc:creator>
      <dc:date>2016-02-17T04:01:27Z</dc:date>
    </item>
    <item>
      <title>Re: EIM Internel Module Multiplexing</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/EIM-Internel-Module-Multiplexing/m-p/464413#M73062</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; It is not a problem (to leave floating high address lines) if these signals &lt;/P&gt;&lt;P&gt;are not used in Your device, connected to the EIM. Address range is defined&lt;/P&gt;&lt;P&gt;by CS. Please refer to Table 2-1 (System memory map) and section 22.4 (Chip &lt;BR /&gt;Select Memory Map)&amp;nbsp; of the Reference Manual.&amp;nbsp; CS must be used.&lt;/P&gt;&lt;P&gt;Note, address range will be restricted by low 16 bit.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Feb 2016 06:19:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/EIM-Internel-Module-Multiplexing/m-p/464413#M73062</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-02-17T06:19:03Z</dc:date>
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