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    <title>topic Re: Memory density in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Memory-density/m-p/463260#M72824</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;As per Table 2-1 Max DRAM size is 2GB. That is for LPDDR2 memory.&lt;/P&gt;&lt;P&gt;For DDR3/3L, As per table # Table 34-1 on Page # 2049 of iMX6UL Ref manual, Max density per DDR device is 1GB, and out of Two chip selects there is only one Chip select for DDR3/3L.&lt;/P&gt;&lt;P&gt;That means we can interface max 1GB DDR3/3L DRAM memory. Please confirm.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 12 May 2016 08:58:08 GMT</pubDate>
    <dc:creator>riteshpatel</dc:creator>
    <dc:date>2016-05-12T08:58:08Z</dc:date>
    <item>
      <title>Memory density</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Memory-density/m-p/463258#M72822</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using iMX6UL in my custom board. Right now i am using 512MB DDR3L DRAM and 1GB NAND Flash.&lt;/P&gt;&lt;P&gt;I want to know maximum density supported for DRAM and Flash memory.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I got max density is 1GB for DDR3/3L from Table 34-1 in iMX6UL Ref Manual, Rev 0. &amp;amp; 2GB for LPDDR2 as there are two chip selects for LPDDR2. Please correct me if I am wrong.&lt;/P&gt;&lt;P&gt;I didn't found max density support for NAND and eMMC memories. Please let me know the density and reference in ref manual. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Seeking for your earliest response.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Ritesh.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 May 2016 05:44:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Memory-density/m-p/463258#M72822</guid>
      <dc:creator>riteshpatel</dc:creator>
      <dc:date>2016-05-12T05:44:38Z</dc:date>
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    <item>
      <title>Re: Memory density</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Memory-density/m-p/463259#M72823</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Maximum DRAM memory size is 2GB. Please refer to Table 2-1 (System memory map)&lt;/P&gt;&lt;P&gt;of the i.MX6 UL Reference Manual.&lt;/P&gt;&lt;P&gt; As for NAND - there are no i.MX6 hardware / specified restrictions on supported &lt;SPAN class="&amp;amp;quothighlight&amp;quot;"&gt;&lt;/SPAN&gt; size.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 May 2016 06:58:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Memory-density/m-p/463259#M72823</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-05-12T06:58:26Z</dc:date>
    </item>
    <item>
      <title>Re: Memory density</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Memory-density/m-p/463260#M72824</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;As per Table 2-1 Max DRAM size is 2GB. That is for LPDDR2 memory.&lt;/P&gt;&lt;P&gt;For DDR3/3L, As per table # Table 34-1 on Page # 2049 of iMX6UL Ref manual, Max density per DDR device is 1GB, and out of Two chip selects there is only one Chip select for DDR3/3L.&lt;/P&gt;&lt;P&gt;That means we can interface max 1GB DDR3/3L DRAM memory. Please confirm.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 May 2016 08:58:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Memory-density/m-p/463260#M72824</guid>
      <dc:creator>riteshpatel</dc:creator>
      <dc:date>2016-05-12T08:58:08Z</dc:date>
    </item>
    <item>
      <title>Re: Memory density</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Memory-density/m-p/463261#M72825</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The i.MX 6UltraLite supports single Chip Select DDR3 memory with CS0_B, ODT0, and SDCKE0.&lt;/P&gt;&lt;P&gt;data bus width = 16 bit ;&lt;/P&gt;&lt;P&gt;Column size = (up) 12 bits ;&lt;/P&gt;&lt;P&gt;Row size&amp;nbsp; = 16 bits ;&lt;/P&gt;&lt;P&gt;banks = 3 bits.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Such parameters allow to address all available 2GB area. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 13 May 2016 03:38:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Memory-density/m-p/463261#M72825</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-05-13T03:38:09Z</dc:date>
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