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    <title>i.MX ProcessorsのトピックRe: KSZ9031 interface with IMX6 Dual Processor</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/KSZ9031-interface-with-IMX6-Dual-Processor/m-p/461772#M72573</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;There is no way to run the RGMII interface without 125MHz reference clock from PHY, connected to the processor's ENET_REF_CLK input. This connection is mandatory. The hardware fix is required.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Artur&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 26 Jan 2016 12:06:59 GMT</pubDate>
    <dc:creator>art</dc:creator>
    <dc:date>2016-01-26T12:06:59Z</dc:date>
    <item>
      <title>KSZ9031 interface with IMX6 Dual Processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/KSZ9031-interface-with-IMX6-Dual-Processor/m-p/461771#M72572</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi everyone,&lt;/P&gt;&lt;P&gt;We are using a custom board which has KSZ9031 phy interfaced with iMX6 dual processor.&lt;/P&gt;&lt;P&gt;The 125 MHz from PHY is not connected to ENET_REF_CLK (V22) of processor.&lt;/P&gt;&lt;P&gt;So, we are not able to succeed in the ethernet functionality test using platform SDK as well as u-boot.&lt;/P&gt;&lt;P&gt;Can anyone confirm whether it is possible to use the board the same way, or a board re-spin is required?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Teju M M B&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Jan 2016 12:14:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/KSZ9031-interface-with-IMX6-Dual-Processor/m-p/461771#M72572</guid>
      <dc:creator>tejummb</dc:creator>
      <dc:date>2016-01-25T12:14:35Z</dc:date>
    </item>
    <item>
      <title>Re: KSZ9031 interface with IMX6 Dual Processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/KSZ9031-interface-with-IMX6-Dual-Processor/m-p/461772#M72573</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;There is no way to run the RGMII interface without 125MHz reference clock from PHY, connected to the processor's ENET_REF_CLK input. This connection is mandatory. The hardware fix is required.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Artur&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Jan 2016 12:06:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/KSZ9031-interface-with-IMX6-Dual-Processor/m-p/461772#M72573</guid>
      <dc:creator>art</dc:creator>
      <dc:date>2016-01-26T12:06:59Z</dc:date>
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