topic iMX6Solo : eMMC boot sequence difference about BOOT_CFG2[7:5] in i.MX Processors

iMX6Solo : eMMC boot sequence difference about BOOT_CFG2[7:5]

koichisakagami — Mon, 25 Jan 2016 09:34:49 GMT

Dear community,
We are checking a booting from the eMMC (Ver5.0) device.

When Bus configuration is set to 8bit (BOOT_CFG2[7:5]=010) , system is able to boot.

However,
Bus configuration is set to 8bit DDR (BOOT_CFG2[7:5]=110) ,system is not able to boot.

We hope to get the information about difference between them ( boot_cfg2 settings).

[Question]

Could you tell us the starting sequence difference ?

For example,
Is it different in issuing command type ?
Is it different in issuing command timing ?
... and so on.

Best Regards,
Koichi Sakagami

Re: iMX6Solo : eMMC boot sequence difference about BOOT_CFG2[7:5]

art — Wed, 27 Jan 2016 08:36:13 GMT

The possible cause of the issue is that the device starts operating in so-called

eMMC 4.4 compliant boot mode. Please refer to the Table 8-17 of the

i.MX6Solo/DualLite Reference Manual Rev.2 document for details.

Have a great day,
Artur

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