topic Power up problems VDDIO in i.MX Processors

Power up problems VDDIO

martinsteurer — Tue, 08 Mar 2016 12:55:24 GMT

Hello,

there are problems during power up with the internal generated voltage VDDIO.

The circuit on my target is similar to the Eval-Board and there is the possibility to power the device by 5V via VDD5V or with 3.3V generated by a flyback via Battery/DCDC_Batt.

The target is connected to a Lauterbach. If the target is powered by 5V I had access to the controller independent if the IMX287 is held in reset or not.

If the target is powered with the 3.3V I have only access to the target in reset condition. By release the reset, the VDDIO voltage drop to 2.5V and there is no communication possible with the Lauterbach.

Different settings of the Registers HW_POWER_5VCTRL, HW_POWER_VDDIOCTRL and HW_POWER_DCDC4P2 are till now not successful.

Is there a special setting necessary or what could be the problem?

Re: Power up problems VDDIO

igorpadykov — Wed, 09 Mar 2016 01:25:46 GMT

Hi Martin

there is "Wait JTAG connection mode" described in

Table 12-3. Boot Mode Selection Map i.MX28 Reference Manual

could you try it.

http://cache.freescale.com/files/dsp/doc/ref_manual/MCIMX28RM.pdf

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

Re: Power up problems VDDIO

martinsteurer — Wed, 09 Mar 2016 08:08:21 GMT

Hi Igor,

we actually use

0 0 0 0 0 1 0 SPI2 SPI master SSP2 boot from flash, 3.3 V (LCD_RS 1)

I could try the ,Wait JTAG connection mode'...

Test finished.

With this Boot Mode the behavior is the same! Independent if the Lauterbach is connected or not.

The DCDC_VDDIO drops from 3.3V to 2.6V after the release of the RESET_N.

regards,

Martin

Re: Power up problems VDDIO

martinsteurer — Wed, 09 Mar 2016 08:38:42 GMT

Hi Igor,

We actually use the SPI master SSP2 boot from Flash 3.3V and the LCD_RS is set to 1.

D6-D0: 0 0 0 0 0 1 0

I test your proposal and the behaviour is the same:

The DCDC_VDDIO drops from 3.3V to 2.6V after the release of the RESET_N.

I guess there is a wrong setting of a bit or value in the HW_POWER memory map.

Some trials from my side are not successful till now.

Mit freundlichen Gruessen / Best regards

Martin Steurer

AES Aerospace Embedded Solutions GmbH

Abteilungsbezeichnung TEE

Department TEE

Friedenheimer Brücke 29

80639 Muenchen

Germany

Tel +49 (0)89 99 82 72-32 01

Fax +49 (0)89 99 82 72-71 072

mailto:martin.steurer@aesolutions.de

http://www.aesolutions.de<http://www.aesolutions.de/>;

Von: igorpadykov

Gesendet: Mittwoch, 9. März 2016 02:27

An: STEURER, Martin <Martin.Steurer@aesolutions.de>

Betreff: Re: - Power up problems VDDIO

NXP Community <https://community.freescale.com/resources/statics/1000/35400-NXP-Community-Email-banner-600x75.jpg>

Power up problems VDDIO

reply from igorpadykov<https://community.freescale.com/people/igorpadykov?et=watches.email.thread> in i.MX Community - View the full discussion<https://community.freescale.com/message/622737?et=watches.email.thread#comment-622737>

Re: Power up problems VDDIO

igorpadykov — Wed, 09 Mar 2016 10:48:23 GMT

Hi Martin

one can check if VDDIO is affected by brownout: tweak BO_OFFSET

in VDDIOCTRL. Could VDDIO be overloaded ?

Best regards

igor

Re: Power up problems VDDIO

martinsteurer — Fri, 11 Mar 2016 05:50:59 GMT

Hi Igor,

We step through the initialization and found the wrong setting in the power register
HW_POWER_5VCTRL and HW_POWER_VDDACTRL.

Now it works.

Thanks for your help