<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic PMIC VGEN6 and AR8031 Sabre Current Inconsistency in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/PMIC-VGEN6-and-AR8031-Sabre-Current-Inconsistency/m-p/459402#M72008</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Greetings,&lt;/P&gt;&lt;P style="text-align: justify;"&gt;&lt;/P&gt;&lt;P style="text-align: justify;"&gt;The AR8031 IC on the Sabre Smart Devices is powered by VGEN6, 6th linear regulator of the PF0100. This regulator is capable of 1,8V - 3,3V voltage supply which is a check, since AR8031 nominal value is 3,3V. However, regarding the datasheet of AR8301, one can find the below table.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/56034i2338EB0EF6DA1623/image-size/large?v=v2&amp;amp;px=999" title="AR8031 Akım Çekme.PNG" alt="AR8031 Akım Çekme.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As you can see the maximum current total that can be drawn by the IC is way above 200 mA, which is the maximum PF0100 is designed for. This arises the question whether if this is because it was thought the currents given on the table are improbable simultaneously or someone missed the table designing the board? This confuses me, can someone please explain why this is a valid design?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Mete &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 25 Jan 2016 06:58:05 GMT</pubDate>
    <dc:creator>atillametetured</dc:creator>
    <dc:date>2016-01-25T06:58:05Z</dc:date>
    <item>
      <title>PMIC VGEN6 and AR8031 Sabre Current Inconsistency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PMIC-VGEN6-and-AR8031-Sabre-Current-Inconsistency/m-p/459402#M72008</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Greetings,&lt;/P&gt;&lt;P style="text-align: justify;"&gt;&lt;/P&gt;&lt;P style="text-align: justify;"&gt;The AR8031 IC on the Sabre Smart Devices is powered by VGEN6, 6th linear regulator of the PF0100. This regulator is capable of 1,8V - 3,3V voltage supply which is a check, since AR8031 nominal value is 3,3V. However, regarding the datasheet of AR8301, one can find the below table.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/56034i2338EB0EF6DA1623/image-size/large?v=v2&amp;amp;px=999" title="AR8031 Akım Çekme.PNG" alt="AR8031 Akım Çekme.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As you can see the maximum current total that can be drawn by the IC is way above 200 mA, which is the maximum PF0100 is designed for. This arises the question whether if this is because it was thought the currents given on the table are improbable simultaneously or someone missed the table designing the board? This confuses me, can someone please explain why this is a valid design?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Mete &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Jan 2016 06:58:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PMIC-VGEN6-and-AR8031-Sabre-Current-Inconsistency/m-p/459402#M72008</guid>
      <dc:creator>atillametetured</dc:creator>
      <dc:date>2016-01-25T06:58:05Z</dc:date>
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    <item>
      <title>Re: PMIC VGEN6 and AR8031 Sabre Current Inconsistency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PMIC-VGEN6-and-AR8031-Sabre-Current-Inconsistency/m-p/459403#M72009</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Atilla&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;acording to AR8031 datasheet p.1:&lt;/P&gt;&lt;P&gt;"The AR8031 requires only a single, 3.3V power&lt;/P&gt;&lt;P&gt;supply. On-chip regulators provide all the other&lt;/P&gt;&lt;P&gt;required voltages."&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;LX 1.1V integrated switching regulator provides power for AVDDL,DVDDL,&lt;/P&gt;&lt;P&gt;so power consumption AVDDL,DVDDL is included in AVDD33 consumption&lt;/P&gt;&lt;P&gt;(powered by VGEN6).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Jan 2016 08:06:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PMIC-VGEN6-and-AR8031-Sabre-Current-Inconsistency/m-p/459403#M72009</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-01-25T08:06:54Z</dc:date>
    </item>
    <item>
      <title>Re: PMIC VGEN6 and AR8031 Sabre Current Inconsistency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PMIC-VGEN6-and-AR8031-Sabre-Current-Inconsistency/m-p/459404#M72010</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think you are right. Thanks for you reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Mete&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Jan 2016 08:21:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PMIC-VGEN6-and-AR8031-Sabre-Current-Inconsistency/m-p/459404#M72010</guid>
      <dc:creator>atillametetured</dc:creator>
      <dc:date>2016-01-25T08:21:07Z</dc:date>
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  </channel>
</rss>

