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    <title>topic Re: ddr3 initialization in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459309#M71973</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;what do you mean by "error: ddr calibration failed" ,&lt;/P&gt;&lt;P&gt;exactly what "calibration": DQS gating calibration, read, write ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 04 Dec 2015 09:59:50 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2015-12-04T09:59:50Z</dc:date>
    <item>
      <title>ddr3 initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459304#M71968</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi I.MX6&amp;nbsp; community&lt;/P&gt;&lt;P&gt; i am facing&amp;nbsp; following problems&lt;/P&gt;&lt;P&gt;1. The PMIC is giving more problems , many of IC's in a lot are not working properly some of them giving 0.8 volts output only.&lt;/P&gt;&lt;P&gt;2. i am debugging with arm ds5, suppose in u-boot case, when i am trying to run a u-boot bin file from DDR3 it is hanging randomly.(output on hyper terminal)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; in my board i am using mt41k256x16 ddr chip(2GB), i have sabresd board (1GB ram) ddr3 script file which is uing for my board.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; is this script works for my board ? if not can any one send the script file for mt41k256x16ha ddr3 chip which is used in sabre ai board.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; i am suspecting ddr init is the problem because one standalone uart application running from iram is working perfectly, when from ddr its not .&lt;/P&gt;&lt;P&gt;3.on sabresd board i want to run httpd server application which i found from sdk.its not working&lt;/P&gt;&lt;P&gt;&amp;nbsp; i connected the board directly to pc using rj45 cable.&amp;nbsp; than i made changes to source file http_main.c&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; a)&amp;nbsp; ip address changed to 172.22.20.61 (my pc ip is 172.22.20.11)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; b)&amp;nbsp; i disabled obtaining of ip using dhcp and auto.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; C) i selected static ip routine&lt;/P&gt;&lt;P&gt;finally compiled and booting from sd card (i went through readme file)&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;than for testing i am browsing from mozilla firefox web browser with &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="http://172.22.20.61" rel="nofollow"&gt;http://172.22.20.61&lt;/A&gt;&lt;SPAN&gt; but its not working&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;is any wrong in my procedure or code ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;plz any one can help&amp;nbsp; to up my board&lt;/P&gt;&lt;P&gt;thanks and regards &lt;/P&gt;&lt;P&gt;Saida&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Dec 2015 04:50:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459304#M71968</guid>
      <dc:creator>saida</dc:creator>
      <dc:date>2015-12-03T04:50:12Z</dc:date>
    </item>
    <item>
      <title>Re: ddr3 initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459305#M71969</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI saida&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;this script may not work for your board even with the same ddrs, due to diffrencies&lt;/P&gt;&lt;P&gt;in board material and layout. Recommended to run ddr test&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-105652"&gt;i.MX6/7 DDR Stress Test Tool V2.30&lt;/A&gt; &lt;/P&gt;&lt;P&gt;then modify script with calibration settings found from ddr test.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Dec 2015 08:59:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459305#M71969</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-12-03T08:59:31Z</dc:date>
    </item>
    <item>
      <title>Re: ddr3 initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459306#M71970</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;igorpady&lt;/P&gt;&lt;P&gt;thanks for you reply&lt;/P&gt;&lt;P&gt;i think the calibration data from ddr stress test is the reference for script file,board.cfg and mt41k256x16.cfg files.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;what about other two problems&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks and regards&lt;/P&gt;&lt;P&gt;saida&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Dec 2015 12:11:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459306#M71970</guid>
      <dc:creator>saida</dc:creator>
      <dc:date>2015-12-03T12:11:28Z</dc:date>
    </item>
    <item>
      <title>Re: ddr3 initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459307#M71971</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;you described many problems, which&lt;/P&gt;&lt;P&gt;"what about other two problems" are you refering ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Dec 2015 13:38:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459307#M71971</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-12-03T13:38:28Z</dc:date>
    </item>
    <item>
      <title>Re: ddr3 initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459308#M71972</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi&lt;/P&gt;&lt;P&gt;yes 2 and 3&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;my ddr calibration is failed with ddr_stress_test_toolv2.30( error: ddr calibration failed)&lt;/P&gt;&lt;P&gt;through u-boot i am downloading file ddr_test_u-boot_jatag_mx6dl.bin to address 0x00907000 iram and running from it&lt;/P&gt;&lt;P&gt;i went through community posts, some of them mentioned that tool compatability issues&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;my cpu if dual lite&lt;/P&gt;&lt;P&gt;ddr: mt41k256m16&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;what could be the problem ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks and regards&lt;/P&gt;&lt;P&gt;Saida&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Dec 2015 09:16:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459308#M71972</guid>
      <dc:creator>saida</dc:creator>
      <dc:date>2015-12-04T09:16:12Z</dc:date>
    </item>
    <item>
      <title>Re: ddr3 initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459309#M71973</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;what do you mean by "error: ddr calibration failed" ,&lt;/P&gt;&lt;P&gt;exactly what "calibration": DQS gating calibration, read, write ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Dec 2015 09:59:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459309#M71973</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-12-04T09:59:50Z</dc:date>
    </item>
    <item>
      <title>Re: ddr3 initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459310#M71974</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;DQS gating calibration failed&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Dec 2015 23:31:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459310#M71974</guid>
      <dc:creator>saida</dc:creator>
      <dc:date>2015-12-04T23:31:15Z</dc:date>
    </item>
    <item>
      <title>Re: ddr3 initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459311#M71975</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;you can ignore it, if all other tests passed.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 05 Dec 2015 01:57:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459311#M71975</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-12-05T01:57:05Z</dc:date>
    </item>
    <item>
      <title>Re: ddr3 initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459312#M71976</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi&lt;/P&gt;&lt;P&gt;no even stress test also failed&lt;/P&gt;&lt;P&gt;error is "written and read data are not matched address failed"&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Dec 2015 11:49:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459312#M71976</guid>
      <dc:creator>saida</dc:creator>
      <dc:date>2015-12-07T11:49:24Z</dc:date>
    </item>
    <item>
      <title>Re: ddr3 initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459313#M71977</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;please check this specific bit (signal line) with oscilloscope&lt;/P&gt;&lt;P&gt;and try to change its drive strength (can be done both from i.MX6 and&lt;/P&gt;&lt;P&gt;ddr side).&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Dec 2015 15:36:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr3-initialization/m-p/459313#M71977</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-12-07T15:36:18Z</dc:date>
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