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    <title>topic modify Clock in Devicetree in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/modify-Clock-in-Devicetree/m-p/457637#M71574</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using the 3.10.53 kernel&lt;/P&gt;&lt;P&gt;the ipg_clock for fec driver i am getting is 66Mhz ,i want to modify &lt;/P&gt;&lt;P&gt;it to 50 Mhz&lt;/P&gt;&lt;P&gt;What change need to be done for that in devicetree ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Himanshu&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 02 Dec 2015 06:40:51 GMT</pubDate>
    <dc:creator>himanshugusain</dc:creator>
    <dc:date>2015-12-02T06:40:51Z</dc:date>
    <item>
      <title>modify Clock in Devicetree</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/modify-Clock-in-Devicetree/m-p/457637#M71574</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using the 3.10.53 kernel&lt;/P&gt;&lt;P&gt;the ipg_clock for fec driver i am getting is 66Mhz ,i want to modify &lt;/P&gt;&lt;P&gt;it to 50 Mhz&lt;/P&gt;&lt;P&gt;What change need to be done for that in devicetree ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Himanshu&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Dec 2015 06:40:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/modify-Clock-in-Devicetree/m-p/457637#M71574</guid>
      <dc:creator>himanshugusain</dc:creator>
      <dc:date>2015-12-02T06:40:51Z</dc:date>
    </item>
    <item>
      <title>Re: modify Clock in Devicetree</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/modify-Clock-in-Devicetree/m-p/457638#M71575</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Himanshu&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ipg_clock is produced from AHB_CLK_ROOT as shown on&lt;/P&gt;&lt;P&gt;Figure 18-5. BUS clock generation &lt;A href="http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf" title="http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf"&gt;http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf&lt;/A&gt; &lt;/P&gt;&lt;P&gt;so changes in devicetree are not sufficient. It is necessary to reprogram pll2/3, producing&lt;/P&gt;&lt;P&gt;this clock.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Dec 2015 11:35:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/modify-Clock-in-Devicetree/m-p/457638#M71575</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-12-02T11:35:48Z</dc:date>
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