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    <title>topic DDR Stress Tester in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Tester/m-p/457341#M71499</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;We have got IMX6 board (Customized board) based on reference designs of sabrelite. Now we are trying to bringup the board and want to port UBoot, Kernel and OS.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Before that, We would like run the DDR_Stress_Tester application to validate LPDDR2 (that our board has), IMX6D. For the same, we have downloaded DDR_Stress_Tester.exe and Mx6DQSDL LPDDR2 Script Aid V0.04.xls file. When we are filling the details in the xls file, it is taking 8 banks where as LPDDR2 has only 4 banks. Board has got Micron's MT42L32M16D1 LPDDR2 module. Please find the datasheet of LPDDR2 and xls file.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;What could be the possible mistake that we are making.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When we are running the DDR stress test then we are taking script files given in the tester application. For LPDDR2, we have got "MX6SL_MMDC_LPDDR2_register_programming_aid_v0.9.inc" but where as our board is based on IMX6D. Our stress test is failing during read operation. is this failing because of the processor difference or for some other reason. &lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336100"&gt;Mx6DQSDL-LPDDR2-Script-Aid-V0.04(2).ods&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 07 Jul 2015 05:53:56 GMT</pubDate>
    <dc:creator>srinivasaporam</dc:creator>
    <dc:date>2015-07-07T05:53:56Z</dc:date>
    <item>
      <title>DDR Stress Tester</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Tester/m-p/457341#M71499</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;We have got IMX6 board (Customized board) based on reference designs of sabrelite. Now we are trying to bringup the board and want to port UBoot, Kernel and OS.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Before that, We would like run the DDR_Stress_Tester application to validate LPDDR2 (that our board has), IMX6D. For the same, we have downloaded DDR_Stress_Tester.exe and Mx6DQSDL LPDDR2 Script Aid V0.04.xls file. When we are filling the details in the xls file, it is taking 8 banks where as LPDDR2 has only 4 banks. Board has got Micron's MT42L32M16D1 LPDDR2 module. Please find the datasheet of LPDDR2 and xls file.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;What could be the possible mistake that we are making.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When we are running the DDR stress test then we are taking script files given in the tester application. For LPDDR2, we have got "MX6SL_MMDC_LPDDR2_register_programming_aid_v0.9.inc" but where as our board is based on IMX6D. Our stress test is failing during read operation. is this failing because of the processor difference or for some other reason. &lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-336100"&gt;Mx6DQSDL-LPDDR2-Script-Aid-V0.04(2).ods&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 07 Jul 2015 05:53:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Tester/m-p/457341#M71499</guid>
      <dc:creator>srinivasaporam</dc:creator>
      <dc:date>2015-07-07T05:53:56Z</dc:date>
    </item>
    <item>
      <title>Re: DDR Stress Tester</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Tester/m-p/457342#M71500</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Srinivasa&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;it is highly recommended to check link below,&lt;/P&gt;&lt;P&gt;describing various pitfalls usage i.MX6DQ with LPDDR2&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/324903"&gt;MX6Q+LPDDR2(32bit) boot issue&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For 4 banks one can manually modify obtained results setting&lt;/P&gt;&lt;P&gt;bit DDR_4_BANK=1, register MMDCx_MDMISC.&lt;/P&gt;&lt;P&gt;If memory is working at all, one can start with simple SDK ddr test,&lt;/P&gt;&lt;P&gt;running it with jtag and checking signals with oscillosope&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&amp;amp;fpsp=1&amp;amp;tab=Design_Tools_Tab"&gt;i.MX 6Series Platform SDK&lt;/A&gt;&amp;nbsp; : Bare-metal SDK&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 07 Jul 2015 07:52:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Tester/m-p/457342#M71500</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-07-07T07:52:01Z</dc:date>
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