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    <title>topic Re: SD1_DATA mux mode in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/SD1-DATA-mux-mode/m-p/444968#M68557</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Vadim&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;these signals are hdmi test signals, mux mode ALT6 was removed from latest RM,&lt;/P&gt;&lt;P&gt;described in sect.35.7.31 Digital Transmission Mode (HDMI_PHY_DIGTXMODE) &lt;A href="http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6SDLRM.pdf?fasp=1&amp;amp;WT_TYPE=Reference%20Manuals&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=pdf&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.pdf"&gt;IMX6SDLRM&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="hdmi.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/9336i2A4E16499A5F4F51/image-size/large?v=v2&amp;amp;px=999" role="button" title="hdmi.jpg" alt="hdmi.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 20 May 2015 04:21:09 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2015-05-20T04:21:09Z</dc:date>
    <item>
      <title>SD1_DATA mux mode</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SD1-DATA-mux-mode/m-p/444967#M68556</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;/P&gt;&lt;P&gt;I'm trying to use the &lt;A class="jive-link-external-small" data-content-finding="Community" href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6DL&amp;amp;fpsp=1&amp;amp;tab=Design_Tools_Tab" rel="nofollow" target="_blank"&gt;"iMX 6Series Plarform SDK v1.1.0"&lt;/A&gt; for my demo board with iMX6DL processor. &lt;/P&gt;&lt;P&gt;There is a function&amp;nbsp; &lt;EM&gt;void hdmi_tx_phydtb_pgm_iomux(void&lt;/EM&gt;)&amp;nbsp; from the file /board/common/board_hdmi.c. &lt;/P&gt;&lt;P&gt;This function configures mux mode to ALT6 for SD1_DATA0 pad and SD1_DATA1 pad ( // for hdmi_tx instance OPHYDTB[0]/OPHYDTB[1] port ??? ). &lt;/P&gt;&lt;P&gt;I have not found this mux mode for SD1_DATA pad from Reference Manual &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE border="1" class="jiveBorder" height="152" style="border: 1px solid rgb(198, 198, 198); width: 515px; height: 123px;"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TH style="text-align: left; background-color: #f2f2f2; color: #505050; padding: 6px;" valign="middle"&gt;&lt;STRONG&gt;Field&lt;/STRONG&gt;&lt;/TH&gt;&lt;TH style="text-align: left; background-color: #f2f2f2; color: #505050; padding: 6px;" valign="middle"&gt;&lt;STRONG&gt;Description&lt;/STRONG&gt;&lt;/TH&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="padding: 6px; text-align: center;"&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2&amp;#150;0 &lt;/P&gt;MUX_MODE&lt;/TD&gt;&lt;TD style="padding: 6px;"&gt;&lt;P&gt;MUX Mode Select Field. &lt;/P&gt;&lt;P&gt;Select 1 of 3 iomux modes to be used for pad: SD1_DAT0. &lt;/P&gt;&lt;P&gt;000 ALT0 &amp;#151; Select signal SD1_DATA0. &lt;/P&gt;&lt;P&gt;011 ALT3 &amp;#151; Select signal GPT_CAPTURE1. &lt;/P&gt;&lt;P&gt;101 ALT5 &amp;#151; Select signal GPIO1_IO16. &lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What makes this setting ? And what is the OPHYDTB ? Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 May 2015 12:22:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SD1-DATA-mux-mode/m-p/444967#M68556</guid>
      <dc:creator>endl</dc:creator>
      <dc:date>2015-05-19T12:22:33Z</dc:date>
    </item>
    <item>
      <title>Re: SD1_DATA mux mode</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SD1-DATA-mux-mode/m-p/444968#M68557</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Vadim&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;these signals are hdmi test signals, mux mode ALT6 was removed from latest RM,&lt;/P&gt;&lt;P&gt;described in sect.35.7.31 Digital Transmission Mode (HDMI_PHY_DIGTXMODE) &lt;A href="http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6SDLRM.pdf?fasp=1&amp;amp;WT_TYPE=Reference%20Manuals&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=pdf&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.pdf"&gt;IMX6SDLRM&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="hdmi.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/9336i2A4E16499A5F4F51/image-size/large?v=v2&amp;amp;px=999" role="button" title="hdmi.jpg" alt="hdmi.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 May 2015 04:21:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SD1-DATA-mux-mode/m-p/444968#M68557</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-05-20T04:21:09Z</dc:date>
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