<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: About i.MX6Q interrupt priority  in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/About-i-MX6Q-interrupt-priority/m-p/442030#M67958</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi li&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;this is described in GIC Architecture Specification from ARM (www.arm.com)&lt;/P&gt;&lt;P&gt;or look at attached document from SDK Chapter 4 Configuring the GIC Driver&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 26 Nov 2015 01:49:28 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2015-11-26T01:49:28Z</dc:date>
    <item>
      <title>About i.MX6Q interrupt priority</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-i-MX6Q-interrupt-priority/m-p/442029#M67957</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt;Dear all,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt;Hello.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt;I have a question about interrupt priority in i.MX6Q.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt;In &lt;SPAN style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;IMX6DQRM, chapter 2, table2-1 system memory map it gives us the interrupt controller and interrupt distributor registers' address range, but I cannot find the definition about these registers. &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;&lt;SPAN style="color: #333333; font-family: arial; font-size: 13px;"&gt;Similarly &lt;/SPAN&gt;it only gives us the registers’ address about interrupt priority &lt;SPAN style="color: #303030; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;in BSP&lt;/SPAN&gt;, besides there is no useful information to this question.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;[Q1]&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;I wonder how to config &lt;SPAN style="color: #303030;"&gt; interrupt priority. &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #303030; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;Best regards.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 25 Nov 2015 03:24:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-i-MX6Q-interrupt-priority/m-p/442029#M67957</guid>
      <dc:creator>ainolike</dc:creator>
      <dc:date>2015-11-25T03:24:02Z</dc:date>
    </item>
    <item>
      <title>Re: About i.MX6Q interrupt priority</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-i-MX6Q-interrupt-priority/m-p/442030#M67958</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi li&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;this is described in GIC Architecture Specification from ARM (www.arm.com)&lt;/P&gt;&lt;P&gt;or look at attached document from SDK Chapter 4 Configuring the GIC Driver&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 26 Nov 2015 01:49:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-i-MX6Q-interrupt-priority/m-p/442030#M67958</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-11-26T01:49:28Z</dc:date>
    </item>
    <item>
      <title>Re: About i.MX6Q interrupt priority</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-i-MX6Q-interrupt-priority/m-p/442031#M67959</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;Thanks for your help. I have looked at the document, but I still cannot deal with it.&lt;/P&gt;&lt;P&gt;In the file vxbArmGenIntCtrl.c, it gives some information as follows,&lt;/P&gt;&lt;P&gt;"&lt;/P&gt;&lt;P&gt;Optinally, the interrupt priority and sensitivity can be set as below in hwconf:&lt;/P&gt;&lt;P&gt;\cs&lt;/P&gt;&lt;P&gt;LOCAL const struct intrCtlrPriority armGICPriority[] = {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; { INT_PIN_TIMER,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; INT_PRI_TIMER_0},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; { INT_PIN_UART,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; INT_PRI_UART_1 },&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; { INT_PIN_DMA,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; INT_PRI_SDMA&amp;nbsp;&amp;nbsp; },&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; { INT_PIN_END,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; INT_PRI_FEC&amp;nbsp;&amp;nbsp;&amp;nbsp; },&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P&gt;\ce&lt;/P&gt;&lt;P&gt;"&lt;/P&gt;&lt;P&gt;Also in BSP of imx31,imx35,imx51,imx53, ect, this method has been used. I try to add my own code in hwconf.c like this.&lt;/P&gt;&lt;P&gt;"&lt;/P&gt;&lt;P&gt;struct intrCtlrPriority imx6Priority[] =&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* pin,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; priority */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {IMX_INT_GPIO1,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 15},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {IMX_INT_GPIO2,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;const struct hcfResource imx6IntCtlrResources[] =&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; { "regBase",&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; HCF_RES_INT,&amp;nbsp;&amp;nbsp; {(void *)ARM_GIC_BASE}},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; { "intMode",&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; HCF_RES_INT,&amp;nbsp;&amp;nbsp; {(void *)INT_MODE}},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; { "input",&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; HCF_RES_ADDR,&amp;nbsp; {(void *)&amp;amp;armGicInputs[0]}},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; { "inputTableSize",&amp;nbsp;&amp;nbsp;&amp;nbsp; HCF_RES_INT,&amp;nbsp;&amp;nbsp; {(void *)NELEMENTS(armGicInputs)}},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; { "priority",&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; HCF_RES_ADDR,&amp;nbsp; {(void *)&amp;amp;imx6Priority[0]}},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; { "priorityTableSize", HCF_RES_INT,&amp;nbsp;&amp;nbsp; {(void *)NELEMENTS(imx6Priority)}},&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;#define imx6IntCtlrNum NELEMENTS(imx6IntCtlrResources)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;const struct hcfDevice hcfDeviceList[] = {&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; {"vxbImx6IntCtrl",&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0, VXB_BUSID_PLB,&amp;nbsp;&amp;nbsp; 0,&amp;nbsp; imx6IntCtlrNum,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; imx6IntCtlrResources},&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;"&lt;/P&gt;&lt;P&gt;But it I could get what i want. Could I do like this? And where is my problem?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 27 Nov 2015 09:20:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-i-MX6Q-interrupt-priority/m-p/442031#M67959</guid>
      <dc:creator>ainolike</dc:creator>
      <dc:date>2015-11-27T09:20:51Z</dc:date>
    </item>
  </channel>
</rss>

