topic Re: CSI 16bits on imx6 in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/CSI-16bits-on-imx6/m-p/440223#M67567 <HTML><HEAD></HEAD><BODY><P>pls refer to the link as below:</P><P></P><P><A href="https://community.nxp.com/docs/DOC-97981">How to Support RGB565 Gated Mode Input to i.MX6 CSI</A> </P></BODY></HTML> Tue, 28 Jul 2015 08:27:10 GMT joanxie 2015-07-28T08:27:10Z CSI 16bits on imx6 https://community.nxp.com/t5/i-MX-Processors/CSI-16bits-on-imx6/m-p/440222#M67566 <HTML><HEAD></HEAD><BODY><P>Hi all,</P><P></P><P>For this remaining question of capturing 16 bits yuv with external hsync/vsync ( IOMUX = D19~D12=Y, D11~D4=U/V,&nbsp; PCLK+HSYNC+VSYNC),</P><P>(so in the case where bt1120 is not used but gated mode only).</P><P></P><P><SPAN>in </SPAN><A class="jive-link-message-small" data-containerid="2004" data-containertype="14" data-objectid="357062" data-objecttype="2" href="https://community.freescale.com/message/357062#357062">https://community.freescale.com/message/357062#357062</A><SPAN>, Rogero Pimentel said in 2013 that "current Freescale Linux BSP doesn't support 16-bit input through CS"I.</SPAN></P><P>Is something new about that ? Is this configuration possible at the end ?</P><P></P><P>Best regards,</P><P>Christophe</P></BODY></HTML> Thu, 23 Jul 2015 09:12:50 GMT https://community.nxp.com/t5/i-MX-Processors/CSI-16bits-on-imx6/m-p/440222#M67566 christophe 2015-07-23T09:12:50Z Re: CSI 16bits on imx6 https://community.nxp.com/t5/i-MX-Processors/CSI-16bits-on-imx6/m-p/440223#M67567 <HTML><HEAD></HEAD><BODY><P>pls refer to the link as below:</P><P></P><P><A href="https://community.nxp.com/docs/DOC-97981">How to Support RGB565 Gated Mode Input to i.MX6 CSI</A> </P></BODY></HTML> Tue, 28 Jul 2015 08:27:10 GMT https://community.nxp.com/t5/i-MX-Processors/CSI-16bits-on-imx6/m-p/440223#M67567 joanxie 2015-07-28T08:27:10Z