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    <title>i.MX Processorsのトピックi.MX6DQ PoP package pin multiplexing.</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6DQ-PoP-package-pin-multiplexing/m-p/435820#M66736</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a question about i.MX6DQ PoP package.&lt;/P&gt;&lt;P&gt;You know the ball mapping of i.MX6DQ PoP package is different from FCBGA package.&lt;/P&gt;&lt;P&gt;Then, how about pin multiplexing?&lt;/P&gt;&lt;P&gt;Are same sigmals are muxed?&lt;/P&gt;&lt;P&gt;(e.g. for EIM_DA0 pad, muxed EIM_AD00, IPU1_DISP1_DATA09, GPIO3_IO00, and SRC_BOOT_CFG00 signals)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 28 Oct 2015 05:07:57 GMT</pubDate>
    <dc:creator>satoshishimoda</dc:creator>
    <dc:date>2015-10-28T05:07:57Z</dc:date>
    <item>
      <title>i.MX6DQ PoP package pin multiplexing.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6DQ-PoP-package-pin-multiplexing/m-p/435820#M66736</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a question about i.MX6DQ PoP package.&lt;/P&gt;&lt;P&gt;You know the ball mapping of i.MX6DQ PoP package is different from FCBGA package.&lt;/P&gt;&lt;P&gt;Then, how about pin multiplexing?&lt;/P&gt;&lt;P&gt;Are same sigmals are muxed?&lt;/P&gt;&lt;P&gt;(e.g. for EIM_DA0 pad, muxed EIM_AD00, IPU1_DISP1_DATA09, GPIO3_IO00, and SRC_BOOT_CFG00 signals)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 Oct 2015 05:07:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6DQ-PoP-package-pin-multiplexing/m-p/435820#M66736</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2015-10-28T05:07:57Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6DQ PoP package pin multiplexing.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6DQ-PoP-package-pin-multiplexing/m-p/435821#M66737</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Satoshi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pin multiplexing for i.MX6DQ PoP package is the same&lt;/P&gt;&lt;P&gt;as for FCBGA package.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Are same sigmals are muxed?&lt;/P&gt;&lt;P&gt;&amp;gt;(e.g. for EIM_DA0 pad, muxed EIM_AD00, IPU1_DISP1_DATA09, GPIO3_IO00, and SRC_BOOT_CFG00 signals)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 Oct 2015 11:43:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6DQ-PoP-package-pin-multiplexing/m-p/435821#M66737</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2015-10-28T11:43:21Z</dc:date>
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