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    <title>i.MX Processorsのトピックi.MX6DL PCIe ext. REFCLK setup</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6DL-PCIe-ext-REFCLK-setup/m-p/434834#M66498</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;can someone explain to me how to set up PCIe clocks in device tree. My custom board with i.MX6DL provides an 125MHz LVDS clock to CLK1 as recommended in the "HW Design Checking List for i.MX6DQSDL".&lt;/P&gt;&lt;P&gt;Unfortunately I have no idea, how to set up device tree for this configuration. I assume at least one of the clocks must be "IMX6QDL_CLK_LVDS1_IN" but which ones?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Additionally, the default setup uses "IMX6QDL_CLK_SATA_REF_100M" for "ref_100m". I am not sure whether this clock is available in i.MX6DL as there is no SATA in i.MX6DL.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As the external PCIe-REFCLK is recommended, there should be some boards using it. Perhaps someone can share his device tree sources with the proper setup of the clocks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Martin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 23 Nov 2015 15:27:16 GMT</pubDate>
    <dc:creator>mahi</dc:creator>
    <dc:date>2015-11-23T15:27:16Z</dc:date>
    <item>
      <title>i.MX6DL PCIe ext. REFCLK setup</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6DL-PCIe-ext-REFCLK-setup/m-p/434834#M66498</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;can someone explain to me how to set up PCIe clocks in device tree. My custom board with i.MX6DL provides an 125MHz LVDS clock to CLK1 as recommended in the "HW Design Checking List for i.MX6DQSDL".&lt;/P&gt;&lt;P&gt;Unfortunately I have no idea, how to set up device tree for this configuration. I assume at least one of the clocks must be "IMX6QDL_CLK_LVDS1_IN" but which ones?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Additionally, the default setup uses "IMX6QDL_CLK_SATA_REF_100M" for "ref_100m". I am not sure whether this clock is available in i.MX6DL as there is no SATA in i.MX6DL.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As the external PCIe-REFCLK is recommended, there should be some boards using it. Perhaps someone can share his device tree sources with the proper setup of the clocks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Martin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Nov 2015 15:27:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6DL-PCIe-ext-REFCLK-setup/m-p/434834#M66498</guid>
      <dc:creator>mahi</dc:creator>
      <dc:date>2015-11-23T15:27:16Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6DL PCIe ext. REFCLK setup</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6DL-PCIe-ext-REFCLK-setup/m-p/434835#M66499</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Basically there are several options for generating clock for i.MX6 PCIe module,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;please look at PCIE_AXI_CLK_ROOT Figure 18-2 "Clock Tree" i.MX6DQ&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;Reference Manual. IMX6 PCIe module requires 125MHz clock for normal&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;operation - all other clocks it produces internally - please refer to&amp;nbsp; section 18.5.1.3.6&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;"Ethernet PLL", it describes&amp;nbsp;&amp;nbsp; Ref_PCIe =125 MHz. Note, 100 MHz PCIe reference&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;clock is generated from this clock internally.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; Also, You may look at the following &lt;BR /&gt; &lt;BR /&gt;&lt;A href="http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/181000.html" title="http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/181000.html"&gt;[PATCH 4/4] ARM i.MX6: Add PCI Express to device tree&lt;/A&gt; &lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 08 Dec 2015 06:31:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6DL-PCIe-ext-REFCLK-setup/m-p/434835#M66499</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2015-12-08T06:31:10Z</dc:date>
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