topic Re: i.MX6q PCIe mem assign errors in i.MX Processors

i.MX6q PCIe mem assign errors

aden — Tue, 08 Sep 2015 08:22:30 GMT

Hello,

I am trying to interface with PLX switch ic and 4 FPGAs using PCIe.

During pcie bring up sequence, I got memory assign errors as follows.

How can I increase pcie mem space?

Kernel 3.0.35

root@freescale ~$ lspci
00:00.0 Class 0604: 16c3:abcd
01:00.0 Class 0604: 10b5:8624
02:01.0 Class 0604: 10b5:8624
02:04.0 Class 0604: 10b5:8624
02:05.0 Class 0604: 10b5:8624
02:06.0 Class 0604: 10b5:8624
02:08.0 Class 0604: 10b5:8624
02:09.0 Class 0604: 10b5:8624
05:00.0 Class 1180: 1b03:7800

06:00.0 Class 1180: 1b03:7800

I got follow dmesg

root@freescale ~$ dmesg \| grep pci
iMX6 PCIe PCIe RC mode imx_pcie_pltfm_probe entering.
PCIE: imx_pcie_pltfm_probe start link up.
pci 0000:00:00.0: [16c3:abcd] type 1 class 0x000604
pci 0000:00:00.0: reg 10: [mem 0x00000000-0x000fffff 64bit pref]
pci 0000:00:00.0: reg 38: [mem 0x00000000-0x0000ffff pref]
pci 0000:00:00.0: supports D1
pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold
pci 0000:00:00.0: PME# disabled
pci 0000:01:00.0: [10b5:8624] type 1 class 0x000604
pci 0000:01:00.0: reg 10: [mem 0x00000000-0x0001ffff]
pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
pci 0000:01:00.0: PME# disabled
pci 0000:02:01.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:01.0: PME# supported from D0 D3hot D3cold
pci 0000:02:01.0: PME# disabled
pci 0000:02:04.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:04.0: PME# supported from D0 D3hot D3cold
pci 0000:02:04.0: PME# disabled
pci 0000:02:05.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:05.0: PME# supported from D0 D3hot D3cold
pci 0000:02:05.0: PME# disabled
pci 0000:02:06.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:06.0: PME# supported from D0 D3hot D3cold
pci 0000:02:06.0: PME# disabled
pci 0000:02:08.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:08.0: PME# supported from D0 D3hot D3cold
pci 0000:02:08.0: PME# disabled
pci 0000:02:09.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:09.0: PME# supported from D0 D3hot D3cold
pci 0000:02:09.0: PME# disabled
pci 0000:05:00.0: [1b03:7800] type 0 class 0x001180
pci 0000:05:00.0: reg 10: [mem 0x00000000-0x0003ffff]
pci 0000:05:00.0: reg 14: [mem 0x00000000-0x007fffff]
pci 0000:05:00.0: reg 18: [mem 0x00000000-0x007fffff]
pci 0000:05:00.0: reg 1c: [mem 0x00000000-0x00ffffff]
pci 0000:05:00.0: reg 20: [mem 0x00000000-0x01ffffff]
pci 0000:06:00.0: [1b03:7800] type 0 class 0x001180
pci 0000:06:00.0: reg 10: [mem 0x00000000-0x0003ffff]
pci 0000:06:00.0: reg 14: [mem 0x00000000-0x007fffff]
pci 0000:06:00.0: reg 18: [mem 0x00000000-0x007fffff]
pci 0000:06:00.0: reg 1c: [mem 0x00000000-0x00ffffff]
pci 0000:06:00.0: reg 20: [mem 0x00000000-0x01ffffff]
pci 0000:00:00.0: BAR 8: can't assign mem (size 0x8a00000)
pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff 64bit pref]

pci 0000:00:00.0: BAR 0: set to [mem 0x01000000-0x010fffff 64bit pref] (PCI add)

pci 0000:00:00.0: BAR 6: assigned [mem 0x01100000-0x0110ffff pref]
pci 0000:01:00.0: BAR 8: can't assign mem (size 0x8800000)
pci 0000:01:00.0: BAR 0: can't assign mem (size 0x20000)
pci 0000:02:05.0: BAR 8: can't assign mem (size 0x4400000)
pci 0000:02:06.0: BAR 8: can't assign mem (size 0x4400000)
pci 0000:02:01.0: PCI bridge to [bus 03-03]
pci 0000:02:01.0: bridge window [io disabled]
pci 0000:02:01.0: bridge window [mem disabled]
pci 0000:02:01.0: bridge window [mem pref disabled]
pci 0000:02:04.0: PCI bridge to [bus 04-04]
pci 0000:02:04.0: bridge window [io disabled]
pci 0000:02:04.0: bridge window [mem disabled]
pci 0000:02:04.0: bridge window [mem pref disabled]
pci 0000:05:00.0: BAR 4: can't assign mem (size 0x2000000)
pci 0000:05:00.0: BAR 3: can't assign mem (size 0x1000000)
pci 0000:05:00.0: BAR 1: can't assign mem (size 0x800000)
pci 0000:05:00.0: BAR 2: can't assign mem (size 0x800000)
pci 0000:05:00.0: BAR 0: can't assign mem (size 0x40000)
pci 0000:02:05.0: PCI bridge to [bus 05-05]
pci 0000:02:05.0: bridge window [io disabled]
pci 0000:02:05.0: bridge window [mem disabled]
pci 0000:02:05.0: bridge window [mem pref disabled]
pci 0000:06:00.0: BAR 4: can't assign mem (size 0x2000000)
pci 0000:06:00.0: BAR 3: can't assign mem (size 0x1000000)
pci 0000:06:00.0: BAR 1: can't assign mem (size 0x800000)
pci 0000:06:00.0: BAR 2: can't assign mem (size 0x800000)
pci 0000:06:00.0: BAR 0: can't assign mem (size 0x40000)
pci 0000:02:06.0: PCI bridge to [bus 06-06]
pci 0000:02:06.0: bridge window [io disabled]
pci 0000:02:06.0: bridge window [mem disabled]
pci 0000:02:06.0: bridge window [mem pref disabled]
pci 0000:02:08.0: PCI bridge to [bus 07-07]
pci 0000:02:08.0: bridge window [io disabled]
pci 0000:02:08.0: bridge window [mem disabled]
pci 0000:02:08.0: bridge window [mem pref disabled]
pci 0000:02:09.0: PCI bridge to [bus 08-08]
pci 0000:02:09.0: bridge window [io disabled]
pci 0000:02:09.0: bridge window [mem disabled]
pci 0000:02:09.0: bridge window [mem pref disabled]
pci 0000:01:00.0: PCI bridge to [bus 02-08]
pci 0000:01:00.0: bridge window [io disabled]
pci 0000:01:00.0: bridge window [mem disabled]
pci 0000:01:00.0: bridge window [mem pref disabled]
pci 0000:00:00.0: PCI bridge to [bus 01-08]
pci 0000:00:00.0: bridge window [io disabled]
pci 0000:00:00.0: bridge window [mem disabled]

pci 0000:00:00.0: bridge window [mem pref disabled]

Best regards

Re: i.MX6q PCIe mem assign errors

Yuri — Tue, 15 Sep 2015 04:29:29 GMT

Hello,

Please try the recent BSP L.3.14.28

http://www.freescale.com/products/arm-processors/i.mx-applications-processors-based-on-arm-cores/i.mx-6-processors/i.mx6qp/i.mx-6-series-software-and-development-tool-resources:IMX6_SW

In particular You may look at section 42.3 (System Resource: Memory Layout) of

“i.MX_6_Linux_Reference_Manual.pdf” regarding PCIe memory usage.

Total memory size is up to 16 MB.

Have a great day,
Yuri

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Re: i.MX6q PCIe mem assign errors

phanthavongdoua — Fri, 02 Oct 2015 18:06:10 GMT

Hi Yuri,

I have similar issue where my device driver failed to allocate memory for the bars and I am using 3.14.28

imx6q-pcie 1ffc000.pcie: PCI host bridge to bus 0000:00

pci_bus 0000:00: root bus resource [io 0x1000-0x10000]

pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff]

pci_bus 0000:00: root bus resource [bus 00-ff]

pci_bus 0000:00: scanning bus

pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400

pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff]

pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref]

pci 0000:00:00.0: calling pci_fixup_ide_bases+0x0/0x3c

pci 0000:00:00.0: supports D1

pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold

pci 0000:00:00.0: PME# disabled

pci_bus 0000:00: fixups for bus

PCI: bus0: Fast back to back transfers disabled

pci 0000:00:00.0: scanning [bus 01-01] behind bridge, pass 0

pci 0000:00:00.0: scanning [bus 00-00] behind bridge, pass 1

pci_bus 0000:01: scanning bus

pci 0000:01:00.0: [1a33:8201] type 00 class 0x040000

pci 0000:01:00.0: reg 0x10: [mem 0xff000000-0xffffffff]

pci 0000:01:00.0: reg 0x20: [mem 0xffff0000-0xffffffff]

pci 0000:01:00.0: reg 0x24: [mem 0xfffff000-0xffffffff]

pci 0000:01:00.0: calling pci_fixup_ide_bases+0x0/0x3c

pci 0000:01:00.0: PME# supported from D0 D3hot

pci 0000:01:00.0: PME# disabled

pci_bus 0000:01: fixups for bus

PCI: bus1: Fast back to back transfers disabled

pci_bus 0000:01: bus scan returning with max=01

pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01

pci_bus 0000:00: bus scan returning with max=01

pci 0000:00:00.0: fixup irq: got 20

pci 0000:00:00.0: assigning IRQ 20

pci 0000:01:00.0: fixup irq: got 20

pci 0000:01:00.0: assigning IRQ 20

pci 0000:00:00.0: BAR 14: can't assign mem (size 0x1800000)

pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff]

pci 0000:00:00.0: BAR 0: set to [mem 0x01000000-0x010fffff] (PCI address [0x1000000-0x10fffff])

pci 0000:00:00.0: BAR 6: assigned [mem 0x01100000-0x0110ffff pref]

pci 0000:01:00.0: BAR 0: can't assign mem (size 0x1000000)

pci 0000:01:00.0: BAR 4: can't assign mem (size 0x10000)

pci 0000:01:00.0: BAR 5: can't assign mem (size 0x1000)

pci 0000:00:00.0: PCI bridge to [bus 01]

pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt

pci 0000:01:00.0: Signaling PME through PCIe PME interrupt

pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded

Re: i.MX6q PCIe mem assign errors

phanthavongdoua — Fri, 02 Oct 2015 18:10:23 GMT

Hi Yuri,

Here is the link for my discussion if you can help with:

Re: Adding PCI-e device driver for SABRE-SD board

Regards,

Phan. Douangphachanh

Re: i.MX6q PCIe mem assign errors

aden — Mon, 23 Nov 2015 06:18:51 GMT

Hi,

We tried to modify the kernel source to increase PCIE Memory regions as follows

PCIE_ARB_BASE_ADDR and PCIE_ARB_END_ADDR in mx6.h.

/* CPU Memory Map */

#define PCIE_ARB_BASE_ADDR 0xE0000000

#define PCIE_ARB_END_ADDR 0xFFFFFFFF

But System crash happened in function imx_pcie_regions_setup.

I am curious about the fundamental question whether it is possible to increase

PCIe memory by modifying or not? moreover, Can we assign memory resource to another place?

Best regards

Aden Yoon